CBIT17F02_CANDO Implant Reliability Test Chip
Technology: AMS 0.35μm 2P4M CMOS (C35B4C3)
Silicon Area: 2mm × 3.5mm
Description: Test structures for reliability testing of implantable packaging and CT ADC design.
Designers: Federico Mazza, Yan Liu
Tape-out: June 2017
- Ghoreishizadeh S, Haci D, Liu Y, Donaldson N, Constandinou TG, 2017, Four-Wire Interface ASIC for a Multi-Implant Link, IEEE Transactions on Circuits and Systems I: Regular Papers, Pages: 1-12, ISSN: 1549-8328
- Ramezani R, Dehkhoda F, Soltan A, Degenaar P, Liu Y, Constandinou TG, 2016, An Optrode with built-in self-diagnostic and fracture sensor for cortical brain stimulation, 12th IEEE Biomedical Circuits and Systems Conference (BioCAS), Publisher: IEEE, Pages: 392-395, ISSN: 2163-4025