2011 NGNI Neural Test Circuits (CBIT11G01_NGNI)
Neural interface test circuits including power optimised front-end bio-potential amplifier, current-mode A-to-D, charge-balanced voltage-mode electrical stimulator, test structures for flash memory.
- Related projects: NGNI
Technology: AMS 0.18μm 1P4M HV CMOS (H18A4)
Silicon Area: 2.8mm × 2.1mm
Designers: Sivylla Paraskevopoulou, Song Luan, Bard Haaheim, Yan Liu, Timothy G. Constandinou
Tape-out: July 2011
- S. Luan, and T. G. Constandinou, "A charge-metering method for voltage-mode neural stimulation", Journal of neuroscience methods, vol. 224, pp. 39-47, 2014.
- B. Haaheim and T. G. Constandinou, "A sub-1µW, 16kHz current-mode SAR-ADC for single-neuron spike recording," 2012 IEEE International Symposium on Circuits and Systems, Seoul, 2012, pp. 2957-2960.
- S. E. Paraskevopoulou and T. G. Constandinou, "An ultra-low-power front-end neural interface with automatic gain for uncalibrated monitoring," 2012 IEEE International Symposium on Circuits and Systems, Seoul, 2012, pp. 193-196.
- S. E. Paraskevopoulou and T. G. Constandinou, "A sub-1µW neural spike-peak detection and spike-count rate encoding circuit," 2011 IEEE Biomedical Circuits and Systems Conference (BioCAS), San Diego, CA, 2011, pp. 29-32.