Dr. Christos Bouganis received the M.Eng degree in Computer Engineering and Informatics from University of Patras Greece in 1998, the MSc degree in Communications and Signal Processing in 1999 and the Ph.D. degree in 2004 both from Imperial College London. He joined the Department of Electrical and Electronic Engineering as academic faculty in 2007.
He is currently a Reader in Intelligent Digital Systems with the Department of Electrical and Electronic Engineering, the Director of Postgraduate Studies of the department and leads the Intelligent Digital Systems Lab (iDSL).
His research inlcudes the theory and practice of reconfigurable computing and design automation, mainly targeting digital signal processing algorithms. His work is currently focused on Machine Learning, Computer Vision and Image Processing, Markov Chain Monte Carlo Systems, and computing with unreliable hardware.
He currently serves on the program committees of many international conferences, including FCCM, FPL, FPT, DATE, SPPRA, and VLSI-SoC and is an editorial board member of IET Computers and Digital Techniques and Journal of Systems Architecture.
Current research opportunities
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Liu S, Mingas G, Bouganis C, 2016, An Unbiased MCMC FPGA-based Accelerator in the Land of Custom Precision Arithmetic, IEEE Transactions on Computers, Vol:66, ISSN:0018-9340, Pages:745-758
Papadonikolakis M, Bouganis C, 2012, Novel Cascade FPGA Accelerator for Support Vector Machines Classification, Ieee Transactions on Neural Networks and Learning Systems, Vol:23, Pages:1042-1052
et al., 2010, An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator, ACM Transactions on Reconfigurable Technology and Systems, Vol:4, ISSN:1936-7414
Bouganis C, Pournara I, Cheung PYK, 2010, Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs, Ieee Transactions on Very Large Scale Integration (vlsi) Systems, Vol:18
et al., 2009, Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement, Acm Transactions on Reconfigurable Technology and Systems (trets), Vol:2
et al., 2009, Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs, ACM Transactions on Reconfigurable Technology and Systems, Vol:1, ISSN:1936-7406