Imperial College London
Alternate

ProfessorChristos-SavvasBouganis

Faculty of Engineering, Department of Electrical and Electronic Engineering

Professor of Intelligent Digital Systems
 
 
 
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Contact

 

+44 (0)20 7594 6144christos-savvas.bouganis Website

 
 
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Location

 

904Electrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Kouris:2020:10.23919/DATE48585.2020.9116248,
author = {Kouris, A and Venieris, S and Bouganis, C-S},
doi = {10.23919/DATE48585.2020.9116248},
pages = {1656--1661},
publisher = {IEEE},
title = {A throughput-latency co-optimised cascade of convolutional neural network classifiers},
url = {http://dx.doi.org/10.23919/DATE48585.2020.9116248},
year = {2020}
}
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RIS format (EndNote, RefMan)

TY  - CPAPER
AB  - Convolutional Neural Networks constitute a promi-nent  AI  model  for  classification  tasks,  serving  a  broad  span  ofdiverse application domains. To enable their efficient deploymentin  real-world  tasks,  the  inherent  redundancy  of  CNNs  is  fre-quently  exploited  to  eliminate  unnecessary  computational  costs.Driven by the fact that not all inputs require the same amount ofcomputation to drive a confident prediction, multi-precision cas-cade classifiers have been recently introduced. FPGAs comprise apromising platform for the deployment of such input-dependentcomputation  models,  due  to  their  enhanced  customisation  ca-pabilities.  Current  literature,  however,  is  limited  to  throughput-optimised cascade implementations, employing large batching atthe expense of a substantial latency aggravation prohibiting theirdeployment on real-time scenarios. In this work, we introduce anovel methodology for throughput-latency co-optimised cascadedCNN  classification,  deployed  on  a  custom  FPGA  architecturetailored   to   the   target   application   and   deployment   platform,with  respect  to  a  set  of user-specified  requirements  on  accuracyand  performance.  Our  experiments  indicate  that  the  proposedapproach  achieves  comparable  throughput  gains  with  relatedstate-of-the-art  works,  under  substantially  reduced  overhead  inlatency, enabling its deployment on latency-sensitive applications.
AU  - Kouris,A
AU  - Venieris,S
AU  - Bouganis,C-S
DO  - 10.23919/DATE48585.2020.9116248
EP  - 1661
PB  - IEEE
PY  - 2020///
SP  - 1656
TI  - A throughput-latency co-optimised cascade of convolutional neural network classifiers
UR  - http://dx.doi.org/10.23919/DATE48585.2020.9116248
UR  - https://ieeexplore.ieee.org/document/9116248
UR  - http://hdl.handle.net/10044/1/75445
ER  -
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