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@inproceedings{Boikos:2016:10.1109/FPL.2016.7577365,
author = {Boikos, K and Bouganis, C-S},
doi = {10.1109/FPL.2016.7577365},
publisher = {IEEE},
title = {Semi-dense SLAM on an FPGA SoC},
url = {http://dx.doi.org/10.1109/FPL.2016.7577365},
year = {2016}
}

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TY  - CPAPER
AB  - Deploying advanced Simultaneous Localisation and Mapping, or SLAM, algorithms in autonomous low-power robotics will enable emerging new applications which require an accurate and information rich reconstruction of the environment. This has not been achieved so far because accuracy and dense 3D reconstruction come with a high computational complexity. This paper discusses custom hardware design on a novel platform for embedded SLAM, an FPGA-SoC, combining an embedded CPU and programmable logic on the same chip. The use of programmable logic, tightly integrated with an efficient multicore embedded CPU stands to provide an effective solution to this problem. In this work an average framerate of more than 4 frames/second for a resolution of 320×240 has been achieved with an estimated power of less than 1 Watt for the custom hardware. In comparison to the software-only version, running on a dual-core ARM processor, an acceleration of 2× has been achieved for LSD-SLAM, without any compromise in the quality of the result.
AU  - Boikos,K
AU  - Bouganis,C-S
DO  - 10.1109/FPL.2016.7577365
PB  - IEEE
PY  - 2016///
SN  - 1946-1488
TI  - Semi-dense SLAM on an FPGA SoC
UR  - http://dx.doi.org/10.1109/FPL.2016.7577365
UR  - http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000386610400067&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=1ba7043ffcc86c417c072aa74d649202
UR  - http://hdl.handle.net/10044/1/43363
ER  -

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ProfessorChristos-SavvasBouganis

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