Imperial College London


Faculty of EngineeringDepartment of Electrical and Electronic Engineering

Research Assistant







Electrical EngineeringSouth Kensington Campus






BibTex format

author = {Ghoreishizadeh, S and Haci, D and Liu, Y and Constandinou, T},
doi = {10.1109/LASCAS.2017.7948050},
pages = {49--52},
publisher = {IEEE},
title = {A 4-wire interface SoC for shared multi-implant power transfer and full-duplex communication},
url = {},
year = {2017}

RIS format (EndNote, RefMan)

AB - This paper describes a novel system for recovering power and providing full-duplex communication over an AC-coupled 4-wire lead between active implantable devices. The target application requires a single Chest Device be connected to a Brain Implant consisting of multiple identical optrodes that record neural activity and provide closed loop optical stimulation. The interface is integrated within each optrode SoC allowing full-duplex and fully-differential communication based on Manchester encoding. The system features a head-to-chest uplink data rate (1.6 Mbps) that is higher than that of the chest-to-head downlink (100kbps) superimposed on a power carrier. On-chip power management provides an unregulated 5 V DC supply with up to 2.5 mA output current for stimulation, and a regulated 3.3 V with 60 dB PSRR for recording and logic circuits. The circuit has been implemented in a 0.35 μm CMOS technology, occupying 1.4 mm 2 silicon area, and requiring a 62.2 μA average current consumption.
AU - Ghoreishizadeh,S
AU - Haci,D
AU - Liu,Y
AU - Constandinou,T
DO - 10.1109/LASCAS.2017.7948050
EP - 52
PY - 2017///
SN - 2473-4667
SP - 49
TI - A 4-wire interface SoC for shared multi-implant power transfer and full-duplex communication
UR -
UR -
ER -