Hello! I'm David Thomas and am a lecturer in this fine department. I'm part of the Circuits and Systems research group in EEE, which means I'm on level 9 of the EEE building, and more specifically in room 903.
I currently teach three courses:
- Language Processors (EE2-15) : an introduction to automata theory and compiler design, resulting in the creation of a C compiler, taken by EIE students in the second year.
- Computer Architecture (C210=EE2-13) : an introduction to CPU design, taken by both EIE and Computing students in the second year.
- High Performance Computing for Engineers (EE4-63) : tries to get people up and running with practical multi-core and GPU programming, without most of the pain of parallel programming. Currently available to 4th years from EEE, EIE, and the ADIC MSc programme
I am also the course director for the Electronic and Information Engineering degree course (previously called Information Systems Engineering (ISE)).
Within the Circuits and Systems group I run the Accelerated Numerics research group. This group mostly explores ways in which accelerators such as FPGAs and GPUs can be used to accelerate compute-intensive numerical calculations, such as in computational finance (though more recently this has started to encompass data-oriented processing as well). My particular interest is in trying to rethink algorithms and applications to take advantage of hardware, rather than trying to force existing software algorithms and C code into an FPGA.
In 2016 I am hosting ASAP 2016
Inggs G, Thomas DB, Luk W, 2017, A Domain Specific Approach to High Performance Heterogeneous Computing, Ieee Transactions on Parallel and Distributed Systems, Vol:28, ISSN:1045-9219, Pages:2-15
Wijeyasinghe M, Thomas D, 2017, Combining hardware and software codecs to enhance data channels in FPGA streaming systems, Microprocessors and Microsystems, Vol:51, ISSN:0141-9331, Pages:275-288
et al., PushPush: Seamless integration of hardware and software objects via function calls over AXI, FPL
et al., System-level Linking of Synthesised Hardware and Compiled Software Using a Higher-order Type System, FPGA
et al., Recursive pipelined genetic propagation for bilevel optimisation, FPL