Summary
Dr Deren Barsakcioglu is a research associate at Department of Bioengineering at Imperial College London. He received B.Sc. degree in Electrical and Computer Engineering from University of Texas at Austin, and M.Sc. in Analogue and Digital Integrated Circuit Design at Imperial College London in 2010 and 2011, respectively. He later joined Next Generation Neural Interfaces research group at Imperial College where he received his PhD in biomedical circuits and systems in 2016.
Following his PhD, Dr Barsakcioglu was awarded EPSRC Doctoral Prize Fellowship and worked as a Research Associate in Next Generation Neural Interfaces research group at the Department of Electrical and Electronic Engineering. In October 2017, he joined Farina Group at Department of Bioengineering where he currently carries out research on neural signal processing for spike sorting and electrophysiological decoding of human movements in upper limb prosthesis control.
Dr Barsakcioglu's main research interest is developing technologies for human-machine interfacing. His research focuses on biomedical signal processing, machine learning and real-time embedded systems.
Publications
Journals
Navajas J, Barsakcioglu DY, Eftekhar A, et al., 2014, Minimum requirements for accurate and efficient real-time on-chip spike sorting, Journal of Neuroscience Methods, Vol:230, ISSN:0165-0270, Pages:51-64
Barsakcioglu DY, Liu Y, Bhunjun P, et al., 2014, An Analogue Front-End Model for Developing Neural Spike Sorting Systems, Ieee Transactions on Biomedical Circuits and Systems, Vol:8, ISSN:1932-4545, Pages:216-227
Conference
Barsakcioglu DY, Farina D, 2018, A real-time surface EMG decomposition system for non-invasive human-machine interfaces
Davila-Montero S, Barsakcioglu DY, Jackson A, et al., 2017, Real-time Clustering Algorithm that Adapts to Dynamic Changes in Neural Recordings, IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, Pages:690-693, ISSN:0271-4302
Barsakcioglu DY, Constandinou TG, 2016, A 32-Channel MCU-based Feature Extraction and Classification for Scalable On-node Spike Sorting, IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, Pages:1310-1313, ISSN:0271-4302