James Davis is a Research Associate in the Department of Electrical and Electronic Engineering's Circuits and Systems group at Imperial College London. He is currently a partner of the EPSRC-funded PRiME project.
You can find James on Google Scholar.
His research interests include:
- Runtime monitoring of digital electronic hardware
- Computer arithmetic
- Fault tolerance, reliability and lifetime extension
- Adaptive systems
- Reconfigurable computing
- Heterogeneous and embedded systems
et al., 2017, KAPow: High-accuracy, Low-overhead Online Per-module Power Estimation for FPGA Designs, Acm Transactions on Reconfigurable Technology and Systems, Vol:10, ISSN:1936-7406
et al., 2017, KOCL: Power Self-awareness for Arbitrary FPGA-SoC-accelerated OpenCL Applications, Ieee Design and Test, Vol:PP, ISSN:2168-2356
et al., 2017, Voltage, Throughput, Power, Reliability, and Multicore Scaling, Computer, Vol:50, ISSN:0018-9162, Pages:34-45
et al., ARCHITECT: Arbitrary-precision Constant-hardware Iterative Compute, International Conference on Field-programmable Technology (FPT), IEEE
et al., 2017, STRIPE: Signal Selection for Runtime Power Estimation, International Confererence on Field-programmable Logic and Applications (FPL), IEEE, Pages:1-8