Imperial College London

Dr James J. Davis

Faculty of EngineeringDepartment of Electrical and Electronic Engineering

Research Associate



james.davis06 Website




906Electrical EngineeringSouth Kensington Campus





James Davis is a Research Associate in the Department of Electrical and Electronic Engineering's Circuits and Systems group at Imperial College London. He is currently a partner of the EPSRC-funded PRiME project.

James' research interests include:

  • Runtime monitoring of digital electronic hardware
  • Computer arithmetic
  • Fault tolerance, reliability and lifetime extension
  • Adaptive systems
  • Reconfigurable computing
  • Heterogeneous and embedded systems



Davis JJ, Hung E, Levine JM, et al., 2017, KAPow: High-accuracy, Low-overhead Online Per-module Power Estimation for FPGA Designs, Acm Transactions on Reconfigurable Technology and Systems, ISSN:1936-7406

Davis JJ, Levine JM, Stott EA, et al., 2017, KOCL: Power Self-awareness for Arbitrary FPGA-SoC-accelerated OpenCL Applications, Ieee Design and Test, Vol:PP, ISSN:2168-2356

Xia F, Rafiev A, Aalsaud A, et al., 2017, Voltage, Throughput, Power, Reliability, and Multicore Scaling, Computer, Vol:50, ISSN:0018-9162, Pages:34-45


Davis J, Levine J, Stott E, et al., STRIPE: signal selection for runtime power estimation, International Confererence on Field-programmable Logic and Applications (FPL), IEEE

Hung E, Davis JJ, Levine JM, et al., KAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA Designs, IEEE Symposium on Field-programmable Custom Computing Machines (FCCM), IEEE, Pages:56-63

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