Imperial College London

Dr James J. Davis

Faculty of EngineeringDepartment of Electrical and Electronic Engineering

Research Associate



james.davis06 Website




906Electrical EngineeringSouth Kensington Campus





James Davis is a Research Associate in the Department of Electrical and Electronic Engineering's Circuits and Systems group at Imperial College London. He is currently a partner of the EPSRC-funded PRiME project.

You can find James on Google Scholar.

His research interests include:

  • Runtime monitoring of digital electronic hardware
  • Computer arithmetic
  • Fault tolerance, reliability and lifetime extension
  • Adaptive systems
  • Reconfigurable computing
  • Heterogeneous and embedded systems



Davis JJ, Hung E, Levine JM, et al., 2018, KAPow: High-accuracy, low-overhead online per-module power estimation for FPGA designs, Acm Transactions on Reconfigurable Technology and Systems, Vol:11, ISSN:1936-7406

Davis JJ, Levine JM, Stott EA, et al., 2017, KOCL: Power Self-awareness for Arbitrary FPGA-SoC-accelerated OpenCL Applications, Ieee Design and Test, Vol:34, ISSN:2168-2356, Pages:36-45

Xia F, Rafiev A, Aalsaud A, et al., 2017, Voltage, Throughput, Power, Reliability, and Multicore Scaling, Computer, Vol:50, ISSN:0018-9162, Pages:34-45


Li H, Davis JJ, Wickerson JP, et al., ARCHITECT: Arbitrary-precision Constant-hardware Iterative Compute, International Conference on Field-programmable Technology (FPT), IEEE

Davis JJ, Levine JM, Stott EA, et al., 2017, STRIPE: Signal selection for runtime power estimation

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