James Davis is a Research Associate in the Department of Electrical and Electronic Engineering's Circuits and Systems group at Imperial College London. He is currently a partner of the EPSRC-funded PRiME project.
His research interests include:
- Runtime monitoring of digital electronic hardware
- Computer arithmetic
- Fault tolerance, reliability and lifetime extension
- Adaptive systems
- Reconfigurable computing
- Heterogeneous and embedded systems.
James currently serves on the technical programme committees of the FPT, FPL and FCCM conferences and is an IEEE Best Paper Award recipient. He is a Member of the IEEE and ACM.
et al., 2018, KAPow: High-accuracy, Low-overhead Online Per-module Power Estimation for FPGA Designs, Acm Transactions on Reconfigurable Technology and Systems, Vol:11, ISSN:1936-7406, Pages:2:1-2:22
et al., KOCL: Kernel-level Power Estimation for Arbitrary FPGA-SoC-accelerated OpenCL Applications, International Workshop on OpenCL (IWOCL) 2018, ACM
Wang E, Davis JJ, Cheung P, A PYNQ-based Framework for Rapid CNN Prototyping, IEEE Symposium on Field-programmable Custom Computing Machines (FCCM) 2018, IEEE
et al., Digit Elision for Arbitrary-accuracy Iterative Computation, IEEE Symposium on Computer Arithmetic (ARITH) 2018, IEEE
et al., 2018, ARCHITECT: Arbitrary-precision Constant-hardware Iterative Compute, International Conference on Field-programmable Technology (FPT) 2017, IEEE, Pages:73-79