Imperial College London

ProfessorKristelFobelets

Faculty of EngineeringDepartment of Electrical and Electronic Engineering

Professor of Nanodevices
 
 
 
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Contact

 

+44 (0)20 7594 6236k.fobelets Website CV

 
 
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Assistant

 

Ms Susan Brace +44 (0)20 7594 6215

 
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Location

 

714Electrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Publication Type
Year
to

200 results found

García-García E, Meziani YM, Velázquez-Pérez JE, Coquillat D, Dyakonova N, Knap W, Grigelionis I, Fobelets Ket al., 2011, Non-resonant terahertz detection by strained-Si modulation doped field effect transistors: first terahertz imaging, 1st International Symposium on Terahertz Nanoscience (TeraNano 2011) and 2nd Workshop of International Terahertz Research Network (GDR-I THz 2011)

Conference paper

Li CB, Fobelets K, Durrani ZAK, 2010, Study of two-step etch Si nanowire arrays, International conference on nanoscience and technology

Conference paper

Zaremba-Tymieniecki M, Li C, Fobelets K, Durrani ZAKet al., 2010, Field-effect transistors using silicon nanowiresprepared by electroless chemical etching, IEEE Electron Device Letters, Vol: 31, Pages: 860-862, ISSN: 0741-3106

Silicon nanowires, prepared by electroless chemical etching, are used to fabricate dual-gate field-effect transistors. The diameters of the nanowires vary from 40–300 nm, with a maximum aspect ratio of ˜3000. Titanium silicide contacts are fabricated on single nanowires. An aluminium top-gate, combined with a back-gate, forms a dual-gate transistor. In an n-channeldevice with a nanowire diameter of ˜70 nm, the output characteristics show current saturation, with a maximum current of ˜100 nA. A drain-source threshold voltage exists for current flow,controlled by the gate voltage, and assists in device turn-off. The ON/OFF current ratio is ˜3000, and the subthreshold swing is ˜780 mV/decade.

Journal article

Shadrokh Y, Fobelets K, Velazquez-Perez JE, 2010, Tuneable CMOS and current mirror circuit with double-gate screen grid field effect transistors, Pages: 11-16, ISSN: 0272-9172

The multiple-gate aspect of the Screen Grid Field Effect Transistor (SGrFET) increases functionality and reduces component count of circuits. An independently-driven gate SGrFET is used to control the switching voltage as well as the gain factor of an inverter. The multi-gate configuration of the SGrFET allows a decrease in output conductance without an increase of transistors count. This leads to a reduction in fabrication complexity, chip area and parasitics. In addition, a simple SGrFETs-based current mirror circuit is proposed with gain factor control. © 2010 Materials Research Society.

Conference paper

Meziani YM, El Moutaouakil A, Velazquez E, Diez E, Fobelets K, Otsuji Tet al., 2010, Terahertz photomixing in Strained Silicon MODFET, 35th International Conference on Infrared, Millimeter and Terahertz Waves, Publisher: IEEE

Conference paper

Fobelets K, Rumyantsev SL, Hackbarth T, Shur MSet al., 2009, 1/<i>f</i> Noise and trap density in n-channel strained-Si/SiGe modulation doped field effect transistors, SOLID-STATE ELECTRONICS, Vol: 53, Pages: 626-629, ISSN: 0038-1101

Journal article

Fobelets K, Rumyantsev SL, Ding PW, Velazquez-Perez JEet al., 2009, 1/f Noise in p-Channel Screen-Grid Field Effect Transistors (SGrFETs) as a Device Evaluation Tool, 20th International Conference on Noise and Fluctuations, Publisher: AMER INST PHYSICS, Pages: 349-352, ISSN: 0094-243X

Conference paper

Shadrokh Y, Fobelets K, Velazquez-Perez JE, 2009, Optimizing the Screen-Grid Field Effect Transistor for High Drive Current and Low Miller Capacitance, Symposium on Functional Metal-Oxide Nanostructures held at the 2009 MRS Spring Meeting, Publisher: MATERIALS RESEARCH SOCIETY, Pages: 149-156, ISSN: 0272-9172

Conference paper

Eng KG, Fobelets K, Velazquez-Perez JE, 2009, Screen-Grid Field Effect Transistor for Sensing Bio-Molecules, Symposium on Materials and Strategies for Lab-on-a-Chip - Biological Analysis, Cell-Material InterFaces and Fluidic Assembly of Nanostructures held at the 2009 MRS Spring Meeting, Publisher: MATERIALS RESEARCH SOCIETY, Pages: 127-132, ISSN: 0272-9172

Conference paper

Fobelets K, Velazquez-Perez JE, 2009, Noise in strained Si MOSFETs for low-power applications, JOURNAL OF STATISTICAL MECHANICS-THEORY AND EXPERIMENT, ISSN: 1742-5468

Journal article

Calvo-Gallego J, Fobelets K, Velazquez Perez JE, 2009, Analysis of RF noise performance of Si/SiGe pseudomorphic MOSFETs, 7th Spanish Conference on Electron Devices, Publisher: IEEE, Pages: 479-+

Conference paper

Fobelets K, Ding PW, Shadrokh Y, Velazquez-Perez JEet al., 2008, Analog and digital performance of the screen-grid field effect transistor (SGRFET), International Journal of High Speed Electronics and Systems, Vol: 18, Pages: 783-792, ISSN: 0129-1564

The Screen-Grid Field Effect Transistor (SGrFET) is a planar MOSFET-type device with a gating configuration consisting of metal cylindrical fingers inside the channel perpendicular to the current flow. The SGrFET operates in a MESFET mode using oxide insulated gates. The multi-gate configuration offers advantages for both analog and digital applications, whilst the gate cylinder holes can be exploited for bio-applications. In this manuscript TCAD results are presented on the analog and digital performance of the Screen-Grid Field Effect Transistor. The results are compared to the operation of an SOI-MOSFET and a finFET. © 2008 World Scientific Publishing Company.

Journal article

Rumyantsev SL, Fobelets K, Veksler D, Hackbarth T, Shur MSet al., 2008, Strained-Si modulation doped field effect transistors as detectors of terahertz and sub-terahertz radiation, SEMICONDUCTOR SCIENCE AND TECHNOLOGY, Vol: 23, ISSN: 0268-1242

Journal article

Shadrokh Y, Fobelets K, Velazquez-Perez JE, 2008, Comparison of the multi-gate functionality of screen-grid field effect transistors with finFETs, SEMICONDUCTOR SCIENCE AND TECHNOLOGY, Vol: 23, ISSN: 0268-1242

Journal article

Fobelets K, Velazquez-Perez JE, 2008, Unipolar rectifying silicon nanowires-TCAD study, Pages: 2481-2484, ISSN: 1386-9477

Due to the large surface to volume ratio in nanowires, small changes in surface condition result in large changes in current-voltage characteristics. As a consequence, the overlap of the end-wire contact with the oxide-covered surface along the length of the nanowire can have a significant effect on the current-voltage characteristics of the wire. We present TCAD studies of this effect. One of the contacts at the end of the wire envelops a part of the surface along the length of the oxide-covered nanowire, resulting in a partial gating of the wire by the voltage applied to the Ohmic contact. This gating causes rectifying behaviour in the unipolar nanowire, creating a conducting surface channel in forward bias and space-charge-limited current in reverse bias. TCAD studies show that the length of contact overlap relative to the length of the nanowire influences the off-current to a large extent, dramatically decreasing the off-current with increasing overlap. TCAD results of the influence of wire diameter, length, and workfunction on the rectifying behaviour of the unipolar nanowire are also presented. © 2007 Elsevier B.V. All rights reserved.

Conference paper

Fobelets K, Rurnyantsev SL, Shur MS, Olsen SHet al., 2008, Influence of the Ge concentration in the virtual substrate on the low frequency noise in strained-Si surface <i>n</i>-channel metal-oxide-semiconductor field-effect transistors, JOURNAL OF APPLIED PHYSICS, Vol: 103, ISSN: 0021-8979

Journal article

Shadrokh Y, Fobelets K, Velazquez-Perez JE, 2008, Two Device Screen Grid Field Effect Transistor Logic, ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY, Vol: 11, Pages: 37-48, ISSN: 1453-8245

Journal article

Fobelets K, Ding PW, Shadrokh Y, Velazquez-Perez JEet al., 2008, Analog and Digital performance of the screen-grid Field Effect Transistor, International Journal of High Speed Electronics and Systems, Vol: 4

Journal article

Fobelets K, Rumyantsev S, Van Roy W, Vanheertum R, Shur MSet al., 2008, Correlation between flicker noise and current linearity in ferromagnetic-GaAs-metal tunnel contacts, 26th International Conference on Microelectronics (MIEL 2008), Publisher: IEEE, Pages: 553-+, ISSN: 2159-1660

Conference paper

Shadrokh Y, Fobelets K, Velazquez-Perez JE, 2007, Single Device Logic using 3D Gating of Screen Grid Field Effect Transistors

Conference paper

Fobelets K, Velazquez-Perez J, 2007, Unipolar rectifying silicon nanowires – TCAD study, Physica E: Low-dimensional Systems and Nanostructures, Vol: On-line

Journal article

Rumyantsev S L, Fobelets K, Hackbarth K, Shur M Set al., 2007, Low frequency noise in insulated-gate strained-Si n-channel modulation doped field effect transistors, Japanese Journal of Applied Physics, Vol: 46, Pages: 4011-4015

Journal article

Fobelets K, Velazquez-Perez JE, Hackbarth T, 2007, Study of the MOS-gated strained-Si buried channel Field Effect transistor, IETE J. of Research Special Issue on Strained-Si Heterostructures and Devices, Vol: 35, Pages: 253-262

Journal article

Fobelets K, Ding PW, Velazquez-Perez JE, 2007, A novel 3D embedded gate field effect transistor - Screen-grid FET - Device concept and modelling, SOLID-STATE ELECTRONICS, Vol: 51, Pages: 749-756, ISSN: 0038-1101

Journal article

Fobelets K, Gaspari V, Ding PW, 2006, Subthreshold operation of a monolithically integrated strained-Si current mirror at low temperatures, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, Vol: 53, Pages: 1215-1219, ISSN: 1057-7130

Journal article

Fobelets K, Ding P W, Velazquez-Perez J E, 2006, A novel 3D embedded gate field effect transistor: Device concept and modelling

Conference paper

Fobelets K, Vincent B, Christofi A, Ahmad M M, McPhail D S, Zhang Jet al., 2006, Visualisation of Ge condensation in SOI

Conference paper

Ding P W, Fobelets K, Velazquez-Perez J E, 2006, 3D modelling of the novel screen-grid FET

Conference paper

Fobelets K, Ding PW, Velazquez-Perez JE, 2006, A novel 3D embedded gate Field Effect Transistor: Device concept and modelling, Pages: 455-458

A novel 3D Field Effect Transistor on SOI - the screen grid FET (SGFET) - for ultra-low power applications is proposed and TCAD analysis of the device is presented. The device is designed with the aim of decoupling the need for aggressive scaling of the gate oxide thickness when reducing the channel length. Other scaling objectives are: retaining low doping in the channel, maintaining the drain conductance and optimizing the low power/low voltage device behaviour. The simulation results show that these objectives are fulfilled: oxide thickness and channel doping have a reduced influence on the threshold voltage and do not need to be scaled aggressively to reduce the short channel effects. Finally, we show that the device performance for low-power/low-voltage applications is excellent. © 2006 IEEE.

Conference paper

Ding PW, Fobelets K, Velazquez-Perez JE, 2006, 3D modelling of the novel nanoscale screen-grid FET, Symposium on Transistor Scaling - Methods, Materials and Modeling held at the 2006 MRS Spring Meeting, Publisher: MATERIALS RESEARCH SOCIETY, Pages: 185-190, ISSN: 0272-9172

Conference paper

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