Imperial College London
Alternate

Professor Peter Y. K. Cheung

Faculty of Engineering, Dyson School of Design Engineering

Professor of Digital Systems
 
 
 
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Contact

 

+44 (0)20 7594 6200p.cheung Website

 
 
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Assistant

 

Mrs Wiesia Hsissen +44 (0)20 7594 6261

 
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Location

 

910BElectrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@article{Guan:2014:10.1587/elex.11.20140011,
author = {Guan, Z and Wong, JSJ and Chaudhuri, S and Constantinides, G and Cheung, PYK},
doi = {10.1587/elex.11.20140011},
journal = {IEICE ELECTRONICS EXPRESS},
title = {Mitigation of process variation effect in FPGAs with partial rerouting method},
url = {http://dx.doi.org/10.1587/elex.11.20140011},
volume = {11},
year = {2014}
}
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RIS format (EndNote, RefMan)

TY  - JOUR
AU  - Guan,Z
AU  - Wong,JSJ
AU  - Chaudhuri,S
AU  - Constantinides,G
AU  - Cheung,PYK
DO  - 10.1587/elex.11.20140011
PY  - 2014///
SN  - 1349-2543
TI  - Mitigation of process variation effect in FPGAs with partial rerouting method
T2  - IEICE ELECTRONICS EXPRESS
UR  - http://dx.doi.org/10.1587/elex.11.20140011
UR  - https://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000333894200015&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=a2bf6146997ec60c407a63945d4e92bb
VL  - 11
ER  -
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