Song Luan received the M.Sc. in analogue and digital integrated circuit design and Ph.D. degrees in biomedical microelectronics engineering from Imperial College London in 2010 and 2014 respectively.In 2014, he works as a research associate in the Next Generation Neural Interfaces Lab.
He has designed different types of integrated neural stimulation circuits and systems with 0.35 and 0.18 um process. He is also an advanced engineer in PCB, firmware and software development for in-house custom hardware.
His main research interests include chronic implantable neural interfaces and its applications, low power microelectronics and wireless power/data link.
Luan S, Constandinou TG, 2014, A charge-metering method for voltage-mode neural stimulation, Journal of Neuroscience Methods, Vol:224, ISSN:0165-0270, Pages:39-47
et al., An Event-Driven SoC for Neural Recording, IEEE Biomedical Circuits and Systems (BioCAS) Conference, IEEE, Pages:404-407
et al., 2016, Next Generation Neural Interfaces for low-power multichannel spike sorting, FENS Forum of Neuroscience, FENS
et al., A 32-Channel Bidirectional Neural/EMG Interface with on-Chip Spike Detection for Sensorimotor Feedback, IEEE Biomedical Circuits and Systems (BioCAS) Conference, IEEE, Pages:528-531
et al., 2015, A Scalable 32 Channel Neural Recording and Real-time FPGA Based Spike Sorting System, 11th IEEE Annual Biomedical Circuits and Systems Conference (BioCAS), IEEE, Pages:188-191, ISSN:2163-4025