Dr Timothy Constandinou is a Reader in Neural Microsystems at Imperial College London and also Deputy Director of the Centre for Bio-inspired Technology. Dr Constandinou received BEng and PhD degrees in Electronic Engineering from Imperial College London in 2001 and 2005, respectively.
He leads the Next Generation Neural Interfaces research group at Imperial. The group utilizes integrated circuit and microsystem technologies to create advanced neural interfaces that enable new scientific and prosthetic applications. The ultimate goal is to develop devices that interface with neural pathways for restoring lost function in sensory, cognitive and motor impaired patients.
Within the IEEE he serves on several committees/panels, etc, regularly contributing to conference organization, technical activities and governance. He currently serves on the IEEE Circuits & Systems Society (CASS) Board of Governors for the term 2017-19, is associate editor of IEEE Trans. Biomedical Circuits & Systems (TBioCAS), chairs the IEEE CASS Sensory Systems Technical Committee, and serves on the IEEE BRAIN Initiative Steering Committee and IEEE CASS BioCAS Technical Committee.
Liu Y, Pereira J, Constandinou TG, 2018, Event-driven processing for hardware-efficient neural spike sorting, Journal of Neural Engineering, Vol:15, ISSN:1741-2552, Pages:1-14
et al., 2017, Four-Wire Interface ASIC for a Multi-Implant Link, IEEE Transactions on Circuits and Systems. Part 1: Regular Papers, Vol:64, ISSN:1549-8328, Pages:3056-3067
Leene L, Constandinou TG, 2017, Time Domain Processing Techniques Using Ring Oscillator-Based Filter Structures, IEEE Transactions on Circuits and Systems. Part 1: Regular Papers, Vol:64, ISSN:1549-8328, Pages:3003-3012
Leene L, Constandinou TG, 2017, A 0.016² 12b ΔΣSAR With 14fJ/conv. for ultra low power biosensor arrays, IEEE Transactions on Circuits and Systems. Part 1: Regular Papers, Vol:64, ISSN:1549-8328, Pages:2655-2665
et al., 2014, Minimum Requirements for Accurate and Efficient Real-Time On-Chip Spike Sorting, Journal of Neuroscience Methods, Pages:51-64
Williams I, Constandinou TG, 2013, An Energy-Efficient, Dynamic Voltage Scaling Neural Stimulator for a Proprioceptive Prosthesis, IEEE Transactions on Biomedical Circuits and Systems, Vol:7, ISSN:1932-4545, Pages:129-139
et al., 2013, Feature extraction using first and second derivative extrema (FSDE) for real-time and hardware-efficient spike sorting, Journal of Neuroscience Methods, Vol:215, ISSN:0165-0270, Pages:29-37
et al., 2015, A Scalable 32 Channel Neural Recording and Real-time FPGA Based Spike Sorting System, 11th IEEE Annual Biomedical Circuits and Systems Conference (BioCAS), IEEE, Pages:188-191, ISSN:2163-4025