Imperial College London
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Professor Tim Green, FREng

Faculty of Engineering, Department of Electrical and Electronic Engineering

Academic Leader for Sustainability, Professor
 
 
 
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Contact

 

+44 (0)20 7594 6171t.green Website CV

 
 
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Location

 

1107EElectrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@article{Leterme:2019:10.1109/tpel.2019.2954743,
author = {Leterme, W and Judge, PD and Wylie, J and Green, TC},
doi = {10.1109/tpel.2019.2954743},
journal = {IEEE Transactions on Power Electronics},
pages = {5753--5769},
title = {Modeling of MMCs with controlled DC fault blocking capability for DC protection studies},
url = {http://dx.doi.org/10.1109/tpel.2019.2954743},
volume = {35},
year = {2019}
}
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RIS format (EndNote, RefMan)

TY  - JOUR
AB  - The fault current characteristics in dc systemsdepend largely on the response, and hence also the topology,of the ac-dc converters. The presently used ac-dc convertertopologies may be categorized into those with controlled oruncontrolled fault blocking capability and those lacking suchcapability. For the topologies of the former category, genericmodels of the dc-side fault response have not yet been developedand a characterization of the influence of control and sensordelays is a notable omission. Therefore, to support accurate andcomprehensive dc system protection studies, this paper presentsthree reduced converter models and analyzes the impact of keyparameters on the dc-side fault response. The models retainaccurate representation of the dc-side current control, but differin representation of the ac-side and internal current controldynamics, and arm voltage limits. The models were verifiedagainst a detailed (full-switched) simulation model for the casesof a full-bridge and a hybrid modular multilevel converter, andvalidated against experimental data from a lab-scale prototype.The models behave similarly in the absence of arm voltage limits,but only the most detailed of the three retains a high degree ofaccuracy when these limits are reached.
AU  - Leterme,W
AU  - Judge,PD
AU  - Wylie,J
AU  - Green,TC
DO  - 10.1109/tpel.2019.2954743
EP  - 5769
PY  - 2019///
SN  - 0885-8993
SP  - 5753
TI  - Modeling of MMCs with controlled DC fault blocking capability for DC protection studies
T2  - IEEE Transactions on Power Electronics
UR  - http://dx.doi.org/10.1109/tpel.2019.2954743
UR  - https://ieeexplore.ieee.org/document/8907360
UR  - http://hdl.handle.net/10044/1/75059
VL  - 35
ER  -
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