Imperial College London

ProfessorWayneLuk

Faculty of EngineeringDepartment of Computing

Professor of Computer Engineering
 
 
 
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Contact

 

+44 (0)20 7594 8313w.luk Website

 
 
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Location

 

434Huxley BuildingSouth Kensington Campus

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Summary

 

Publications

Publication Type
Year
to

620 results found

Constantinides GA, Cheung PYK, Luk W, 2003, Synthesis of Saturation Arithmetic Architectures, ACM Transactions on Design Automation of Electronic Systems, Vol: 8, Pages: 334-354

Journal article

Wiangtong T, Cheung PYK, Luk W, 2002, Comparing three heuristic search methods for functional partitioning in hardware-software codesign, DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, Vol: 6, Pages: 425-449, ISSN: 0929-5585

Journal article

Gaffar AA, Luk W, Cheung PYK, Shirazi N, Hwang Jet al., 2002, Automating customisation of floating-point designs, 12th International Conference on Field-Programmable Logic and Applications, Publisher: SPRINGER-VERLAG BERLIN, Pages: 523-533, ISSN: 0302-9743

Conference paper

Gaffar AA, Mencer O, Luk W, Cheung PYK, Shirazi Net al., 2002, Floating-point bitwidth analysis via automatic differentiation, New York, IEEE international conference on field-programmable technology (FPT), Chinese Univ Hong Kong, New Territories, Peoples Republic of China, 2002, Publisher: IEEE, Pages: 158-165

Conference paper

Gaffar AA, Luk W, Cheung PYK, Shirazi N, Hwang Jet al., 2002, Automating customisation of floating-point designs, Berlin, 12th international conference on field-programmable logic and applications, Montpeller, France, 2002, Publisher: Springer-Verlag, Pages: 523-533

Conference paper

Lee D, Lee TK, Luk W, Cheung PYKet al., 2002, Incremental programming for reconfigurable engines, New York, IEEE international conference on field-programmable technology (FPT), Chinese University of Hong Kong, New Territories, Peoples Republic of China, 2002, Publisher: IEEE, Pages: 411-415

Conference paper

Fidjeland A, Luk W, Muggleton S, 2002, Scalable acceleration of inductive logic programs, New York, IEEE international conference on field-programmable technology (FPT), Chinese Univ Hong Kong, New Territories, Peoples Republic of China, 2002, Publisher: I e e e, Pages: 252-259

Conference paper

Seng S, Luk W, Cheung PYK, Seng S, Luk W, Cheung PYKet al., 2002, Run-time adaptive flexible instruction processors, Berlin, 12th international conference on field-programmable logic and applications, Montpeller, France, 2002, Publisher: Springer-Verlag, Pages: 545-555

Conference paper

Coutinho JGF, Luk W, 2002, Optimising and adapting high-level hardware designs, New York, IEEE international conference on field-programmable technology (FPT), Chinese Univ Hong Kong, New Territories, Peoples R China, 2002, Publisher: IEEE, Pages: 150-157

Conference paper

Gaffar AA, Luk W, Cheung PYK, Shirazi N, Gaffar AA, Luk W, Cheung PYK, Shirazi Net al., 2002, Customising floating-point designs, Los Alamitos, 10th annual IEEE symposium on field-programmable custom computing machines, Napa, California, 2001, Publisher: IEEE Computer Soc, Pages: 315-317

Conference paper

Ip HMD, Low JD, Cheung PYK, Constantinides G, Luk W, Seng SP, Metzgen Pet al., 2002, Strassen's matrix multiplication for customisable processors, New York, IEEE international conference on field-programmable technology (FPT), Chinese Univ Hong Kong, New Territories, Peoples Republic of China, 2002, Publisher: IEEE, Pages: 453-456

Conference paper

Derbyshire A, Luk W, 2002, Compiling run-time parametrisable designs, New York, IEEE international conference on field-programmable technology (FPT), Chinese Univ Hong Kong, New Territories, Peoples R China, 2002, Publisher: I e e e, Pages: 44-51

Conference paper

Jun J, Schmidt S, Luk W, Rueckert D, Jun J, Schmidt S, Luk W, Rueckert Det al., 2002, Parameterising reconfigurable designs for image warping, Bellingham, Conference on reconfigurable technology - FPGAs and reconfigurable processors for computing and communications IV, Boston, Massachusetts, 2002, Publisher: Spie-Int Society Optical Engineering, Pages: 86-97

Conference paper

Styles H, Luk W, 2002, Accelerating radiosity calculations using reconfigurable platforms, Los Alamitos, 10th annual IEEE symposium on field-programmable custom computing machines, Napa, California, 2001, Publisher: IEEE Computer Soc, Pages: 279-281

Conference paper

Thomas DB, Luk W, 2002, Framework for development and distribution of hardware acceleration, Bellingham, Conference on reconfigurable technology - FPGAs and reconfigurable processors for computing and communications IV, Boston, Massachusetts, 2002, Publisher: Spie-Int Society Optical Engineering, Pages: 48-59

Conference paper

Melis WJC, Cheung PY, Luk W, 2002, Image registration of real-time broadcast video using the UltraSONIC reconfigurable computer, Berlin, 12th international conference on field-programmable logic and applications, Montpeller, France, 2002, Publisher: Springer-Verlag, Pages: 1148-1151

Conference paper

Jun J, Luk W, Rueckert D, Jun J, Luk W, Rueckert Det al., 2002, FPGA-based computation of free-form deformations, New York, IEEE international conference on Field-Programmable technology (FPT), Chinese University of Hong Kong, New Territories, Peoples Republic of China, 2002, Publisher: IEEE, Pages: 407-410

Conference paper

Lee TK, Yusuf S, Luk W, Sloman M, Lupu E, Dulay Net al., 2002, Development framework for firewall processors, New York, IEEE international conference on field-programmable technology (FPT), Chinese University of Hong Kong, New Territories, Peoples Republic of China, 2002, Publisher: IEEE, Pages: 352-355

Conference paper

Coutinho JGF, Luk W, Weinhardt M, 2002, Optimising parallel programs for hardware implementation, Bellingham, Conference on reconfigurable technology - FPGAs and reconfigurable processors for computing and communications IV, Boston, Massachusetts, 2002, Publisher: Spie-Int Society Optical Engineering, Pages: 60-70

Conference paper

Melis WJC, Cheung PY, Luk W, 2002, Image registration of real-time broadcast video using the UltraSONIC reconfigurable computer, Berlin, 12th international conference on field-programmable logic and applications, Montpeller, France, 2 - 4 September 2002, Publisher: Springer-Verlag Berlin, Pages: 1148-1151

Conference paper

McKeever S, Luk W, Derbyshire A, 2002, Compiling hardware descriptions with relative placement information for parametrised libraries, Berlin, 4th international conference on formal methods in computer-aided design (FMCAD 2002), Portland, Oregon, Publisher: Springer-Verlag, Pages: 342-359

Conference paper

Luk W, Kean T, Derbyshire A, Gause J, McKeever S, Mencer O, Yeow Aet al., 2001, Parameterized hardware libraries for configurable system-on-chip technology, CANADIAN JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING-REVUE CANADIENNE DE GENIE ELECTRIQUE ET INFORMATIQUE, Vol: 26, Pages: 125-129, ISSN: 0840-8688

Journal article

Weinhardt M, Luk W, 2001, Memory access optimisation for reconfigurable systems, IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, Vol: 148, Pages: 105-112, ISSN: 1350-2387

Journal article

Shirazi N, Benyamin D, Luk W, Cheung PYK, Guo Set al., 2001, Quantitative analysis of FPGA-based database searching, JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, Vol: 28, Pages: 85-96, ISSN: 0922-5773

Journal article

Guo SR, Luk W, 2001, An integrated system for developing regular array designs, JOURNAL OF SYSTEMS ARCHITECTURE, Vol: 47, Pages: 315-337, ISSN: 1383-7621

Journal article

Weinhardt M, Luk W, 2001, Pipeline vectorization, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, Vol: 20, Pages: 234-248, ISSN: 0278-0070

Journal article

McKeever S, Luk W, 2001, Towards provably-correct hardware compilation tools based on pass separation techniques, Pages: 212-227, ISSN: 0302-9743

This paper presents a framework for verifying compilation tools based on parametrised hardware libraries expressed in Pebble, a simple declarative language. Anapproach based on pass separation techniques is described for specifying and verifying Pebble abstraction mechanisms, such as the loop statement.We show how this approach can be used to verify the correctness of the flattening procedure in the Pebble compiler, which also results in a more efficient implementation than a non-verified version. The approach is useful for guiding compiler implementations for Pebble and related languages such as VHDL; it may also form the basis for automating the generation of provably-correct tools for hardware development. © 2001 Springer-Verlag Berlin Heidelberg.

Conference paper

Mencer O, Boullis N, Luk W, Styles Het al., 2001, Parameterized function evaluation for FPGAs, Pages: 544-554, ISSN: 0302-9743

© Springer-Verlag Berlin Heidelberg 2001. This paper presents parameterized module-generators for pipelined function evaluation using lookup tables, adders, shifters and multipliers. We discuss trade-offs involved between (1) full-lookup tables, (2) bipartite (lookup-add) units, (3) lookup-multiply units, and (4) shift-and-add based CORDIC units. For lookup-multiply units we provide equations estimating approximation errors and rounding errors which are used to parameterize the hardware units. The resources and performance of the resulting design can be estimated given the input parameters. The method is implemented as part of the PAM-Blox module generation environment. An example shows that the lookup-multiply unit produces competitive designs with data widths up to 20 bits when compared with shift-and-add based CORDIC units. Additionally, the lookup-multiply method can be used for larger data widths when evaluating functions not supported by CORDIC.

Conference paper

Todman T, Luk W, 2001, Reconfigurable Designs for Ray Tracing, Pages: 300-301

© 2001 Non IEEE. We describe a feasibility study into using reconfigurable hardware for real-time ray tracing. The study includes mapping time-consuming parts of the algorithm into hardware, and transforming the algorithm following a breadth-first approach to improve system performance when the host bus is slow. We also examine the application of runtime reconfiguration, and estimate the reconfigurable resources required for animating complex scenes.

Conference paper

Boullis N, Mencer O, Luk W, Styles Het al., 2001, Pipelined Function Evaluation on FPGAs, Pages: 304-306

© 2001 Non IEEE. This paper presents an approach to parameterizing pipelined designs for differentiable function evaluation using lookup tables, adders and multipliers. Trade-offs involved in implementing the lookup table as a full table or as bipartite tables are discussed. In case of implementations with a lookup table and a multiplier, equations estimating approximation errors and rounding errors can be used to parameterize the hardware unit. The method is implemented as part of the PAM-Blox module generation environment. An example shows that our approach produces competitive designs with data widths up to 20 bits when compared with shift-and-add based CORDIC units; it can be used for larger data widths when evaluating functions not supported by CORDIC.

Conference paper

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