Imperial College London

ProfessorWayneLuk

Faculty of EngineeringDepartment of Computing

Professor of Computer Engineering
 
 
 
//

Contact

 

+44 (0)20 7594 8313w.luk Website

 
 
//

Location

 

434Huxley BuildingSouth Kensington Campus

//

Summary

 

Publications

Citation

BibTex format

@inproceedings{Zhao:2018:10.1109/FPL.2018.00033,
author = {Zhao, R and Ng, HC and Luk, W and Niu, X},
doi = {10.1109/FPL.2018.00033},
pages = {147--154},
title = {Towards efficient convolutional neural network for domain-specific applications on FPGA},
url = {http://dx.doi.org/10.1109/FPL.2018.00033},
year = {2018}
}

RIS format (EndNote, RefMan)

TY  - CPAPER
AB - © 2018 IEEE. FPGA becomes a popular technology for implementing Convolutional Neural Network (CNN) in recent years. Most CNN applications on FPGA are domain-specific, e.g., detecting objects from specific categories, in which commonly-used CNN models pre-trained on general datasets may not be efficient enough. This paper presents TuRF, an end-to-end CNN acceleration framework to efficiently deploy domain-specific applications on FPGA by transfer learning that adapts pre-trained models to specific domains, replacing standard convolution layers with efficient convolution blocks, and applying layer fusion to enhance hardware design performance. We evaluate TuRF by deploying a pre-trained VGG-16 model for a domain-specific image recognition task onto a Stratix V FPGA. Results show that designs generated by TuRF achieve better performance than prior methods for the original VGG-16 and ResNet-50 models, while for the optimised VGG-16 model TuRF designs are more accurate and easier to process. and layer fusion to enhance hardware design performance. We evaluate TuRF by end-to-end deploying a pre-trained VGG-16 model for a domain-specific image recognition task onto Stratix V FPGA. Results show that designs generated by our framework achieve better performance than prior works, regarding the original VGG-16 and ResNet-50, and the optimised VGG-16 model is more accurate and easier to process.
AU - Zhao,R
AU - Ng,HC
AU - Luk,W
AU - Niu,X
DO - 10.1109/FPL.2018.00033
EP - 154
PY - 2018///
SP - 147
TI - Towards efficient convolutional neural network for domain-specific applications on FPGA
UR - http://dx.doi.org/10.1109/FPL.2018.00033
UR - http://hdl.handle.net/10044/1/62190
ER -