Imperial College London

ProfessorWayneLuk

Faculty of EngineeringDepartment of Computing

Professor of Computer Engineering
 
 
 
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Contact

 

+44 (0)20 7594 8313w.luk Website

 
 
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Location

 

434Huxley BuildingSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Wang:2016:10.1007/978-3-319-30481-6_9,
author = {Wang, S and Niu, X and Ma, N and Luk, W and Leong, P and Peng, Y},
doi = {10.1007/978-3-319-30481-6_9},
pages = {105--116},
publisher = {Springer International Publishing},
title = {A scalable dataflow accelerator for real time onboard hyperspectral image classification},
url = {http://dx.doi.org/10.1007/978-3-319-30481-6_9},
year = {2016}
}

RIS format (EndNote, RefMan)

TY  - CPAPER
AB - Real-time hyperspectral image classification is a necessary primitive in many remotely sensed image analysis applications. Previous work has shown that Support Vector Machines (SVMs) can achieve high classification accuracy, but unfortunately it is very computationally expensive. This paper presents a scalable dataflow accelerator on FPGA for real-time SVM classification of hyperspectral images.To address data dependencies, we adapt multi-class classifier based on Hamming distance. The architecture is scalable to high problem dimensionality and available hardware resources. Implementation results show that the FPGA design achieves speedups of 26x, 1335x, 66x and 14x compared with implementations on ZYNQ, ARM, DSP and Xeon processors. Moreover, one to two orders of magnitude reduction in power consumption is achieved for the AVRIS hyperspectral image datasets.
AU - Wang,S
AU - Niu,X
AU - Ma,N
AU - Luk,W
AU - Leong,P
AU - Peng,Y
DO - 10.1007/978-3-319-30481-6_9
EP - 116
PB - Springer International Publishing
PY - 2016///
SN - 0302-9743
SP - 105
TI - A scalable dataflow accelerator for real time onboard hyperspectral image classification
UR - http://dx.doi.org/10.1007/978-3-319-30481-6_9
UR - http://hdl.handle.net/10044/1/33326
ER -