Imperial College London
Professor Wayne Luk

ProfessorWayneLuk

Faculty of Engineering, Department of Computing

Professor of Computer Engineering
 
 
 
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Contact

 

+44 (0)20 7594 8313w.luk Website

 
 
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Location

 

434Huxley BuildingSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@article{Ma:2016:10.16511/j.cnki.qhdxxb.2016.21.004,
author = {Ma, Y and Zhang, C and Luk, W},
doi = {10.16511/j.cnki.qhdxxb.2016.21.004},
journal = {Qinghua Daxue Xuebao/Journal of Tsinghua University},
title = {Hybrid two-stage HW/SW partitioning algorithm for dynamic partial reconfigurable FPGAs},
url = {http://dx.doi.org/10.16511/j.cnki.qhdxxb.2016.21.004},
volume = {56},
year = {2016}
}
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RIS format (EndNote, RefMan)

TY  - JOUR
AB  - More and more hardware platforms are providing dynamic partial reconfiguration; thus, traditional hardware/software partitioning algorithms are no longer applicable. Some studies have analyzed the dynamic partial reconfiguration as mixed-integer linear programming (MILP) models to get solutions. However, the MILP models are slow and can only handle small problems. This paper uses heuristic algorithms to determine the status of some critical tasks to reduce the scale of the MILP problem for large problems. Tests show that this method is about 200 times faster with the same solution quality as the traditional mathematical programming method.
AU  - Ma,Y
AU  - Zhang,C
AU  - Luk,W
DO  - 10.16511/j.cnki.qhdxxb.2016.21.004
PY  - 2016///
SN  - 1000-0054
TI  - Hybrid two-stage HW/SW partitioning algorithm for dynamic partial reconfigurable FPGAs
T2  - Qinghua Daxue Xuebao/Journal of Tsinghua University
UR  - http://dx.doi.org/10.16511/j.cnki.qhdxxb.2016.21.004
VL  - 56
ER  -
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