Imperial College London
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DrYanLiu

Faculty of Engineering, Department of Electrical and Electronic Engineering

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Location

 

Electrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Gao:2017:10.1109/ISCAS.2017.8050422,
author = {Gao, C and Ghoreishizadeh, S and Liu, Y and Constandinou, TG},
doi = {10.1109/ISCAS.2017.8050422},
pages = {678--681},
publisher = {IEEE},
title = {On-chip ID generation for multi-node implantable devices using SA-PUF},
url = {http://dx.doi.org/10.1109/ISCAS.2017.8050422},
year = {2017}
}
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RIS format (EndNote, RefMan)

TY  - CPAPER
AB  - This paper presents a 64-bit on-chip identification system featuring low power consumption and randomness compensation for multi-node bio-implantable devices. A sense amplifier based bit-cell is proposed to realize the silicon physical unclonable function, providing a unique value whose probability has a uniform distribution and minimized influence from the temperature and supply variation. The entire system is designed and implemented in a typical 0.35  m CMOS technology, including an array of 64 bit-cells, readout circuits, and digital controllers for data interfaces. Simulated results show that the proposed bit-cell design achieved a uniformity of 50.24% and a uniqueness of 50.03% for generated IDs. The system achieved an energy consumption of 6.0 pJ per bit with parallel outputs and 17.3 pJ per bit with serial outputs.
AU  - Gao,C
AU  - Ghoreishizadeh,S
AU  - Liu,Y
AU  - Constandinou,TG
DO  - 10.1109/ISCAS.2017.8050422
EP  - 681
PB  - IEEE
PY  - 2017///
SP  - 678
TI  - On-chip ID generation for multi-node implantable devices using SA-PUF
UR  - http://dx.doi.org/10.1109/ISCAS.2017.8050422
UR  - http://hdl.handle.net/10044/1/46110
ER  -
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