Dr. Zhou Jiang is currently a Research Associate in the Circuits and Systems Group. He has completed his PhD at Imperial College London in 2017, his MSc in Integrated Circuit Design at Imperial College in 2012; and his BEng in Electrical and Electronic Engineering at the University of Bristol in 2011.
His research focuses on analogue and digital integrated circuit designs for miniature wireless neuronal activity recording systems. His expertise is in ultra-low power analogue and RF integrated circuits such as amplifiers, filters, analogue-to-digital converters (ADCs), phase-locked loops (PLLs) and RF transmitters.
et al., 2017, TaiNi: maximizing research output whilst improving animals' welfare in neurophysiology experiments, Scientific Reports, Vol:7, ISSN:2045-2322
Imtiaz SA, Jiang Z, Rodriguez Villegas E, 2017, An ultra-low power system-on-chip for automatic sleep staging, Ieee Journal of Solid State Circuits, Vol:52, ISSN:1558-173X, Pages:822-833
et al., 2016, CMOS implementation of a low power absolute value comparator circuit, 14th IEEE International New Circuits and Systems Conference (NEWCAS), IEEE, ISSN:2472-467X
Saraswat R, Rodriguez-Villegas E, Jiang Z, 2016, Low Emission, Open Loop MAC Protocol Compliant Implantable FSK Modulator, 14th IEEE International New Circuits and Systems Conference (NEWCAS), IEEE, ISSN:2472-467X