TY - CPAPER AB - Hardware accelerators are attractive targets for running scientific simulations due to their power efficiency. Since, large software simulations can take person years to develop, it is often impractical to use hardware acceleration, which requires significantly more development effort and expertise than software development. We present the design and implementation of a proof-of-concept compiler toolchain which enables rapid prototyping of hardware finite difference solvers for partial differential equations, generated from a high-level domain specific language. Multiple fields, grid staggering and non-linear terms are supported. We demonstrate that our approach is practical by generating and evaluating hardware designs derived from the heat and simplified shallow water equations. AU - Russell,FP AU - Targett,JS AU - Luk,W DO - 10.1109/ASAP.2018.8445093 PB - IEEE PY - 2018/// SN - 1063-6862 TI - From Tensor Algebra to Hardware Accelerators: Generating Streaming Architectures for Solving Partial Differential Equations UR - http://dx.doi.org/10.1109/ASAP.2018.8445093 UR - http://hdl.handle.net/10044/1/64152 ER -