Instrument Control Units
We have extensive experience in the design and development of robust radiation hardened low power digital controller and interface units for space instruments. In-house designs are flying on a number of missions including Cluster, Double Star, Rosetta and Ulysses and we are currently designing the controller for the magnetometer on the Solar Orbiter mission. The function of Instrument Control Units (ICU) (sometimes called Data Processing Units (DPU)) is to act as the instrument's brain. The ICU takes input signals from the different sub-units and spacecraft bus (tele-commands, sensor data etc) and processes, formats and delivers output signals (telemetry, hardware control etc). In the case of the Cluster, Double Star and Rosetta instruments the controller function is implemented as a micro-processor based PCB acting as a master with sensor and other sub-units as slaves hanging off an internal bus. Glue logic or signal conditioning for internal bus communication has been implemented both with ASIC (Cluster, Double Star) and FPGA designs (Rosetta). Communication with the distinct spacecraft bus is typically achieved with a custom designed ASIC which may or may not be co-located on the ICU board.
Instrument Control Units
Processor cards for space instruments
Limited resources and harsh operating environments mean that processor cards for space instruments are quite limited in scope compared to those in modern PCs. Clock speeds are much reduced and memory is limited to an absolute minimum (say a few hundred kwords) for instrument operation utilising very highly optimised code. The radiation budget is also a major factor governing device selection in the design stage. DPUs, especially for magnetometers are necessarily fully cross-strapped and redundant due to the critical importance of the magnetic field measurement on plasma missions and special attention is given to the operating system code reliability and response to fault conditions.
Imperial College ICU Designs
Our most recently launched DPUs are those of Cluster, Double Star and Rosetta. Each of these designs use a Dynex MAS31750 16 bit processor implementing the MIL-STD-1750A instruction set. On board glue logic is supplied by Actel RH1280 and RT1460A FPGAs. Code for the real time operations is written in Assembler mixed with C/C++ while the FPGAs have been coded using ADA and VHDL. The quality of these designs is demonstrated by the fact that all of the above mentioned DPUs in-flight maintain good performance with failures and no requirement to use redundant (back up) systems (2005).
Recent technological advances mean future controller designs should routinely merge internal instrument control and spacecraft communications together onto one card or even into a single chip. Complementary to this advance is our current development effort into digital fluxgates, where the sensor detection function is transferred from the analogue domain into the digital domain via the next generation of radiation hardened, high speed, high gate FPGA families. This opens up the possibility of very low mass instruments where in some cases the need for a dedicated DPU may even be eliminated. The block diagram above shows a proposed design where communication with the spacecraft is implemented with a SpaceWire ASIC and control of the instrument is realised with an Actel RTAX250S
Current ICU developments for the Solar Orbiter and JUICE missions are now working on designs using more modern powerful CPUs based upon the SPARC-V8 architecture implemented in an Actel RTAX-2000 FPGA, and with the SpaceWire spacecraft communications standard.