Advanced Computer Architecture
Computer architecture concerns the design of general-purpose and special-purpose processors, and of parallel computer systems for applications ranging from embedded robotics through mobile handsets to datacentres and supercomputers.
Through this module you will:
- develop a thorough understanding of high-performance and energy-efficient computer architecture
- learn principles and techniques for evaluating architectural proposals
- explore how knowledge of computer architecture informs software performance engineering
- gain a deep understanding of topical trends in advanced computer architecture, compiler design, operating systems and parallel processing
Upon successful completion of this module you will be able to:
- Justify the design of current, leading-edge processor products at various architectural levels, from microarchitecture to large-scale parallel systems
- evaluate architecture design alternatives and tradeoffs in terms of power and performance
- identify architectural security hazards and attack vulnerabilities and explain how they can be mitigated
- optimise application software kernels to exploit architectural capabilities effectively
- Pipelines, hazards, instruction-level parallelism, locality and caching
- Dynamic scheduling, Tomasulo's algorithm and register renaming
- Software instruction scheduling and software pipelining
- Superscalar and long-instruction-word architectures
- Branch prediction and speculative execution
- Simultaneous multithreading
- Vector instruction execution
- Caches, cache coherency, memory systems, address translation
- Optimisations for parallelism and locality and their automation in compilers
- Graphics processors and manycore architectures
- Security vulnerabilities and their mitigation
The module aims to build your understanding through lively interactive classes, driven by exposure to principles, examples, cunning architectural ideas, and provocative challenges. You will develop and test your understanding through unassessed, formative, exercises that will be undertaken both in-class and in the laboratory. There will also be two assessed laboratory exercises where you will learn to use simulation, in combination with your understanding of underlying architecture principles, to explain performance phenomena. Through these various exercises you will learn to formulate and test performance hypotheses, and to present the results. The goal is to understand the design rationale for current and future designs. The final exam, for which we will prepare extensively, will be based on reading and answering questions on an article describing a leading-edge commercial processor product.
The Piazza Q&A web service will be used as an open online discussion forum for the module.
The module will feature two assessed coursework components: the first, based on the first half of the course, will explore single-core microarchitecture energy efficiency using a simulator running a given program example. The second component, which is more open-ended and can be done in groups of up to three, involves optimising the performance of a simple but interesting application code kernel on hardware of your choosing. These courseworks together count for 20% of the marks for the module. There will be a final written exam assessing both theoretical and practical aspects of the subject, and will, to a substantial extent, be based on an article about a recent processor product, which we will study in class in advance. This exam counts for the remaining 80% of the marks.
There will be detailed feedback on the coursework exercises which will include written feedback on your individual submission and in-class and/ or written feedback explaining common pitfalls and suggestions for improvement.
6th, Morgan Kaufmann Publishers
Second edition, Pearson new international edition., Harlow, Essex : Pearson