BibTex format

author = {Feng, P and Yeon, P and Cheng, Y and Ghovanloo, M and Constandinou, TG},
doi = {10.1109/TBCAS.2018.2853670},
journal = {IEEE Transactions on Biomedical Circuits and Systems},
pages = {1088--1099},
title = {Chip-scale coils for millimeter-sized bio-implants},
url = {},
volume = {12},
year = {2018}

RIS format (EndNote, RefMan)

AB - Next generation implantable neural interfaces are targeting devices with mm-scale form factors that are freely floating and completely wireless. Scalability to more recording (or stimulation) channels will be achieved through distributing multiple devices, instead of the current approach that uses a single centralized implant wired to individual electrodes or arrays. In this way, challenges associated with tethers, micromotion and reliability of wiring is mitigated. This concept is now being applied to both central and peripheral nervous system interfaces. One key requirement, however, is to maximize SAR-constrained achievable wireless power transfer efficiency (PTE) of these inductive links with mm-sized receivers. Chip-scale coil structures for microsystem integration that can provide efficient near-field coupling are investigated. We develop near-optimal geometries for three specific coil structures: “in-CMOS”, “above-CMOS” (planar coil post-fabricated on a substrate) and “around-CMOS” (helical wirewound coil around substrate). We develop analytical and simulation models that have been validated in air and biological tissues by fabrications and experimentally measurements. Specifically, we prototype structures that are constrained to a 4mm x 4mm silicon substrate i.e. the planar in-/above-CMOS coils have outer diameter <4mm, whereas the around-CMOS coil has inner diameter of 4mm. The in-CMOS and above-CMOS coils have metal film thicknesses of 3μm aluminium and 25μm gold, respectively, whereas the around-CMOS coil is fabricated by winding a 25μm gold bonding-wire around the substrate. The measured quality factors (Q) of the mm-scale Rx coils are 10.5 @450.3MHz (in-CMOS), 24.61 @85MHz (above-CMOS), and 26.23 @283MHz (around-CMOS). Also, PTE of 2-coil links based on three types of chip-scale coils is measured in air and tissue environment to demonstrate tissue loss for bio-implants. The SAR-constrained maximum PTE are
AU - Feng,P
AU - Yeon,P
AU - Cheng,Y
AU - Ghovanloo,M
AU - Constandinou,TG
DO - 10.1109/TBCAS.2018.2853670
EP - 1099
PY - 2018///
SN - 1932-4545
SP - 1088
TI - Chip-scale coils for millimeter-sized bio-implants
T2 - IEEE Transactions on Biomedical Circuits and Systems
UR -
UR -
VL - 12
ER -