113 results found
Nassibi A, Papavassiliou C, Atashzar SF, 2022, Depression diagnosis using machine intelligence based on spatiospectrotemporal analysis of multi-channel EEG, MEDICAL & BIOLOGICAL ENGINEERING & COMPUTING, Vol: 60, Pages: 3187-3202, ISSN: 0140-0118
Maheshwari S, Serb A, Papavassiliou C, et al., 2022, An Adiabatic Capacitive Artificial Neuron With RRAM-Based Threshold Detection for Energy-Efficient Neuromorphic Computing, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol: 69, Pages: 3512-3525, ISSN: 1549-8328
Foster P, Huang J, Serb A, et al., 2022, An FPGA-based system for generalised electron devices testing, Scientific Reports, Vol: 12, ISSN: 2045-2322
Electronic systems are becoming more and more ubiquitous as our world digitises. Simultaneously, even basic components are experiencing a wave of improvements with new transistors, memristors, voltage/current references, data converters, etc, being designed every year by hundreds of R &D groups world-wide. To date, the workhorse for testing all these designs has been a suite of lab instruments including oscilloscopes and signal generators, to mention the most popular. However, as components become more complex and pin numbers soar, the need for more parallel and versatile testing tools also becomes more pressing. In this work, we describe and benchmark an FPGA system developed that addresses this need. This general purpose testing system features a 64-channel source-meter unit, and [Formula: see text] banks of 32 digital pins for digital I/O. We demonstrate that this bench-top system can obtain [Formula: see text] current noise floor, [Formula: see text] pulse delivery at [Formula: see text] and [Formula: see text] maximum current drive/channel. We then showcase the instrument's use in performing a selection of three characteristic measurement tasks: (a) current-voltage characterisation of a diode and a transistor, (b) fully parallel read-out of a memristor crossbar array and (c) an integral non-linearity test on a DAC. This work introduces a down-scaled electronics laboratory packaged in a single instrument which provides a shift towards more affordable, reliable, compact and multi-functional instrumentation for emerging electronic technologies.
Raeis-Hosseini N, Chen S, Papavassiliou C, et al., 2022, Impact of Zr top electrode on tantalum oxide-based electrochemical metallization resistive switching memory: towards synaptic functionalities, RSC Advances: an international journal to further the chemical sciences, Vol: 12, Pages: 14235-14245, ISSN: 2046-2069
Electrochemical metallization memory (ECM) devices have been made by sub-stoichiometric deposition of a tantalum oxide switching film (Ta2O5−x) using sputtering. We investigated the influence of zirconium as the active top electrode material in the lithographically fabricated ECM devices. A simple capacitor like (Pt/Zr/Ta2O5−x/Pt) structure represented the resistive switching memory. A cyclic voltammetry measurement demonstrated the electrochemical process of the memory device. The I–V characteristics of ECMs show stable bipolar resistive switching properties with reliable endurance and retention. The resistive switching mechanism results from the formation and rupture of a conductive filament characteristic of ECM. Our results suggest that Zr can be considered a potential active electrode in the ECMs for the next generation of nonvolatile nanoelectronics. We successfully showed that the ECM device can work under AC pulses to emulate the essential characteristics of an artificial synapse by further improvements.
Maheshwari S, Stathopoulos S, Wang J, et al., 2021, Design flow for hybrid CMOS/memristor systems--Part I: modeling and verification steps, IEEE Transactions on Circuits and Systems I: Regular Papers, Vol: 68, Pages: 4862-4875, ISSN: 1549-8328
Memristive technology has experienced explosive growth in the last decade, with multiple device structures being developed for a wide range of applications. However, transitioning the technology from the lab into the marketplace requires the development of an accessible and user-friendly design flow, supported by an industry-grade toolchain. In this work, we demonstrate the behaviour of our in-house fabricated custom memristor model and its integration into the Cadence Electronic Design Automation (EDA) tools for verification. Various input stimuli were given to record the memristive device characteristics both at the device level as well as the schematic level for verification of the memristor model. This design flow from device to industrial level EDA tools is the first step before the model can be used and integrated with Complementary Metal-Oxide Semiconductor (CMOS) in applications for hybrid memristor/CMOS system design.
Maheshwari S, Stathopoulos S, Wang J, et al., 2021, Design flow for hybrid CMOS/memristor systems--Part II: circuit schematics and layout, IEEE Transactions on Circuits and Systems I: Regular Papers, Vol: 68, Pages: 4876-4888, ISSN: 1549-8328
\normalsize The capability of in-memory computation, reconfigurability, low power operation as well as multistate operation of the memristive device deems them a suitable candidate for designing electronic circuits with a broad range of applications. Besides, the integrability of memristor with CMOS enables it to use in logic circuits too. In this work, we demonstrate with examples the design flow for memristor-based electronics, after the custom memristor model already being integrated and validated into our chosen Computer-Aided Design (CAD) tool to performing layout-versus-schematic and post-layout checks including the memristive device. We envisage that this step-by-step guide to introducing memristor into the standard integrated circuit design flow will be a useful reference document for both device developers who wish to benchmark their technologies and circuit designers who wish to experiment with memristive-enhanced systems.
Wang J, Serb A, Papavassiliou C, et al., 2021, Analysing and measuring the performance of memristive integrating amplifiers, INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, Vol: 49, Pages: 3507-3525, ISSN: 0098-9886
Maheshwari S, Serb A, Papavassiliou C, et al., 2021, An Adiabatic Regenerative Capacitive Artificial Neuron, 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE
Wang J, Serb A, Papavassiliou C, et al., 2021, Accounting for Memristor I-V Non-Linearity in Low Power Memristive Amplifiers, 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE
Malik A, Papavassiliou C, Stathopoulos S, 2021, A Stochastic Compact Model Describing Memristor Plasticity and Volatility, 28th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), Publisher: IEEE
Shen J, Stathopoulos S, Prodromakis T, et al., 2021, A reconfigurable CMOS-memristor active inductor, ISCAS 2020, ISSN: 0271-4310
A methodology is introduced here to exploit the programmability of the memristors in order to realize reconfigurable monolithic analogue circuit elements. Classical network synthesis methods are used to synthesize adjustable active inductors with inductance values exceeding those of on-chip passives by several orders of magnitude. In this paper, a wide range of active inductance values are obtained by employing memristor to control the biasing current of operational transconductance amplifiers used to implement gyrators. The gyration constant of the proposed gyrator will be linearly controlled by memristance state. The implementation of the designed circuit is realized in 0.18µm commercially available complementary metal-oxide-semiconductor (CMOS) technology from TSMC. Circuit performance is simulated using Cadence Virtuoso. The utilized off-chip memristor is a metal-oxide bi-layer memristor which exhibits a non-volatile memristance range of 4.7kΩ to 170kΩ. The active inductance range achieved is from approximately 95µH to 1.55mH with an inductive bandwidth of 69MHz and 18MHz respectively. The total power consumption is between 0.21mW to 1.95mW depending on the memristance and equivalent inductance.
Foster P, Huang J, Serb A, et al., 2020, Live Demonstration: Electroforming of TiO2-x memristor devices using high speed pulses, IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, ISSN: 0271-4302
Szypicyn J, Papavassiliou C, Papandroulidakis G, et al., 2020, Memristor-enabled reconfigurable integrated circuits
The holy grail of analogue integrated circuit design is adjustable analogue delay element. Of course, all analogue circuits are filters. Internal delays impose overall low-pass character to all circuits so that broadband amplifiers are lowpass filters, while high-pass amplifiers are in fact band-pass filters.
Foster P, Huang J, Serb A, et al., 2020, An FPGA based system for interfacing with crossbar arrays, IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, ISSN: 0271-4302
Inductor coils are integrated in many wearable garments for EM wave screening, heating and health monitoring. This paper presents a critical evaluation of the inductor characteristics of circular weft knitted coils for applications in e-textiles. Inductors are knitted using circular needles with thin insulated metal wire and yarn knitted together. The resulting helical coils are characterized as a function of number of turns, coil diameter, needle size, and insulated metal wire material. The results are compared to wound coils. Simulations of the knitted and wound coils show close agreement with the experimental results and confirm a higher inductance for the knits compared to the wound coils with the same pitch between turns. The parasitic coil capacitance is higher in the knit due to the vertical legs of the stitches, absent in wound coils. Knits with thin Cu and Litz wires result in flexible and wearable textile coils.
Zhang L, Zhang L, Liu S, et al., 2019, Low-level control technology of micro autonomous underwater vehicle based on intelligent computing, CLUSTER COMPUTING-THE JOURNAL OF NETWORKS SOFTWARE TOOLS AND APPLICATIONS, Vol: 22, Pages: S8569-S8580, ISSN: 1386-7857
Zhang L, Zhang L, Papavassiliou C, et al., 2018, Intelligent Computing for Extended Kalman Filtering SOC Algorithm of Lithium-Ion Battery, WIRELESS PERSONAL COMMUNICATIONS, Vol: 102, Pages: 2063-2076, ISSN: 0929-6212
Zhang L, Liu Z, Papavassiliou C, et al., 2018, Formation path control method for group coordination based on fuzzy logic control method, CLUSTER COMPUTING-THE JOURNAL OF NETWORKS SOFTWARE TOOLS AND APPLICATIONS, Vol: 21, Pages: 855-868, ISSN: 1386-7857
Zhang L, Zhang L, Wang B, et al., 2018, Hybrid Prediction Method for the Electromagnetic Interference Characteristics of Printed Circuit Boards Based on the Equivalent Dipole Model and the Finite-Difference Time Domain Method, IEEE ACCESS, Vol: 6, Pages: 6520-6529, ISSN: 2169-3536
In this paper, we propose a hybrid modeling method for analyzing the electromagnetic compatibility characteristics of printed circuit boards (PCBs). The method uses an equivalent magnetic dipole array deduced from near-field scanning results obtained at a certain height over the PCB surface under test and the finite-difference time domain (FDTD) algorithm. The array of dipoles can simulate the PCB electromagnetic emissions, including the ground plane effect at a particular high frequency; the equivalent dipole array can then be imported into the FDTD calculation space for calculating the electromagnetic fields generated by the dipole array. In our experiment, we obtained the tangential magnetic field distribution of the PCB surface using near-field scanning, from where the tangential magnetic field component, orientation, and the magnitude and phase of the dipoles could be deduced. We used the proposed method to model two different modules on a highly integrated circuit. The results of the proposed method and those obtained by near-field scanning are nearly the same, which demonstrates the effectiveness and accuracy of the proposed method. We therefore conclude that the proposed modeling approach presents a new technique for studying the electromagnetic interference of PCBs.
von Rosenberg W, Chanwimalueang T, Goverdovsky V, et al., 2017, Hearables: feasibility of recording cardiac rhythms from head and in-ear locations, Royal Society Open Science, Vol: 4, ISSN: 2054-5703
Mobile technologies for the recording of vital signs and neural signals are envisaged to underpin the operation of future health services. For practical purposes, unobtrusive devices are favoured, such as those embedded in a helmet or incorporated onto an earplug. However, these locations have so far been underexplored, as the comparably narrow neck impedes the propagation of vital signals from the torso to the head surface. To establish the principles behind electrocardiogram (ECG) recordings from head and ear locations, we first introduce a realistic three-dimensional biophysics model for the propagation of cardiac electric potentials to the head surface, which demonstrates the feasibility of head-ECG recordings. Next, the proposed biophysics propagation model is verified over comprehensive real-world experiments based on head- and in-ear-ECG measurements. It is shown both that the proposed model is an excellent match for the recordings, and that the quality of head- and ear-ECG is sufficient for a reliable identification of the timing and shape of the characteristic P-, Q-, R-, S- and T-waves within the cardiac cycle. This opens up a range of new possibilities in the identification and management of heart conditions, such as myocardial infarction and atrial fibrillation, based on 24/7 continuous in-ear measurements. The study therefore paves the way for the incorporation of the cardiac modality into future ‘hearables’, unobtrusive devices for health monitoring.
Zhang L, Zhang L, Liu S, et al., 2017, Three-Dimensional Underwater Path Planning Based on Modified Wolf Pack Algorithm, IEEE ACCESS, Vol: 5, Pages: 22783-22795, ISSN: 2169-3536
Goverdovsky V, von Rosenberg W, Nakamura T, et al., 2017, Hearables: multimodal physiological in-ear sensing, Scientific Reports, Vol: 7, ISSN: 2045-2322
Future health systems require the means to assess and track the neural and physiological function of a user over long periods of time, and in the community. Human body responses are manifested through multiple, interacting modalities – the mechanical, electrical and chemical; yet, current physiological monitors (e.g. actigraphy, heart rate) largely lack in cross-modal ability, are inconvenient and/or stigmatizing. We address these challenges through an inconspicuous earpiece, which benefits from the relatively stable position of the ear canal with respect to vital organs. Equipped with miniature multimodal sensors, it robustly measures the brain, cardiac and respiratory functions. Comprehensive experiments validate each modality within the proposed earpiece, while its potential in wearable health monitoring is illustrated through case studies spanning these three functions. We further demonstrate how combining data from multiple sensors within such an integrated wearable device improves both the accuracy of measurements and the ability to deal with artifacts in real-world scenarios.
Serb A, Papavassiliou C, Prodromakis T, 2017, A memristor-CMOS hybrid architecture concept for on-line template matching, IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, Pages: 2651-2654, ISSN: 0271-4302
Serb A, Redman-White W, Papavassiliou C, et al., 2016, Practical determination of individual element resistive states in selectorless RRAM arrays, IEEE Transactions on Circuits and Systems Part 1: Regular Papers, Vol: 63, Pages: 827-835, ISSN: 1549-8328
Three distinct methods of reading multi-level cross-point resistive states from selector-less RRAM arrays are implemented in a physical system and compared for read-out accuracy. They are: the standard, direct measurement method and two methods that attempt to enhance accuracy by computing cross-point resistance on the basis of multiple measurements. Results indicate that the standard method performs as well as or better than its competitors. SPICE simulations are then performed with controlled amounts of non-idealities introduced in the system in order to test whether any technique offers particular resilience against typical practical imperfections such as crossbar line resistance. We conclude that even though certain non-idealities are shown to be minimized by different circuit-level read-out strategies, line resistance within the crossbar remains an outstanding challenge.
Berdan R, papavassiliou C, Khiat A, et al., 2016, Live demonstration: characterization of RRAM crossbar arrays at a click of a button, 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, Pages: 1443-1443
We demonstrate a desktop platform which has the ability of fully characterizing RRAM crossbar arrays while not compromising on ease-of-use. The setup consists of our bespoke PCB system connected to a local PC (laptop), on which a Pyhton interface allows the user to directly interact with individual RRAM cells packaged in either crossbar or stand-alone configurations. The platform is capable of current-compliant forming among other exotic pulsing schemes, used for exposing IV and switching characteristics or utilising the devices for a wide range of applications. These operations can be applied on one, or several cells, in an automated fashion, drastically accelerating data acquisition.
Seimeni MA, Gkonis PK, Kaklamiani DI, et al., 2016, Resource management in OFDMA heterogeneous network, 2016 Wireless Telecommunications Symposium (WTS), Publisher: IEEE
In this study, a Long Term Evolution Advanced (LTEa) ??? based multi-user Orthogonal Frequency Division Multiple Access (OFDMA) heterogeneous network has been simulated and a resource allocation strategy has been proposed. The strategy under consideration can inherently mitigate electromagnetic interference, hence increases the mean number of terminals, and requires no channel state information (CSI). To evaluate the performance of the network platform and the proposed strategy, the system is studied for different network orientations. According to the results, the platform is a good reality simulator, whereas owning to the proposed Radio Resource Management (RRM) algorithm the mean capacity can reach a 12-fold increase especially for highly noisy operating environments.
Goverdovsky V, Yates DC, Willerton M, et al., 2016, Modular Software-Defined Radio Testbed for Rapid Prototyping of Localization Algorithms, IEEE Transactions on Instrumentation and Measurement, Vol: 65, Pages: 1577-1584, ISSN: 1557-9662
A fully synchronized modular multichannel software-defined radio (SDR) testbed has been developed for the rapid prototyping and evaluation of array processing algorithms. Based on multiple universal software radio peripherals, this testbed is low cost, wideband, and highly reconfigurable. The testbed can be used to develop new techniques and algorithms in a variety of areas including, but not limited to, direction finding, source triangulation, and wireless sensor networks. A combination of hardware and software techniques is presented, which is shown to successfully remove the inherent phase and frequency uncertainties that exist between the individual SDR peripherals. The adequacy of the developed techniques is demonstrated through the application of the testbed to super-resolution direction finding algorithms, which rely on accurate phase synchronization.
Berdan R, Serb A, Khiat A, et al., 2015, A mu-controller-based system for interfacing selectorless RRAM crossbar arrays, IEEE Transactions on Electron Devices, Vol: 62, Pages: 2190-2196, ISSN: 0018-9383
Selectorless crossbar arrays of resistive randomaccess memory (RRAM), also known as memristors, conduct large sneak currents during operation, which can significantly corrupt the accuracy of cross-point analog resistance (M t ) measurements. In order to mitigate this issue, we have designed, built, and tested a memristor characterization and testing (mCAT) instrument that forces redistribution of sneak currents within the crossbar array, dramatically increasing M t measurement accuracy. We calibrated the mCAT using a custom-made 32 × 32 discrete resistive crossbar array, and subsequently demonstrated its functionality on solid-state TiO 2-x RRAM arrays, on wafer and packaged, of the same size. Our platform can measure standalone M t in the range of 1 kΩ to 1 MΩ with <;1% error. For our custom resistive crossbar, 90% of devices of the same resistance range were measured with <;10% error. The platform's limitations have been quantified using large-scale nonideal crossbar simulations.
Goverdovsky V, Looney D, Kidmose P, et al., 2015, Co-Located Multimodal Sensing: A Next Generation Solution for Wearable Health, IEEE SENSORS JOURNAL, Vol: 15, Pages: 138-145, ISSN: 1530-437X
This data is extracted from the Web of Science and reproduced under a licence from Thomson Reuters. You may not copy or re-distribute this data in whole or in part without the written consent of the Science business of Thomson Reuters.