Summary
Ed Stott is a teaching fellow in the Department of Electrical and Electronic Engineering.
His teaching interests are:
- Practical lab experiments and simulations
- Projects
- Embedded Systems
- Internet of Things
His research interests include:
- The reliability of FPGA and VLSI systems
- User and system-level techniques for improving lifespan of configurable logic
- Variation-aware design and yield improvement
- Self-test and characterisation of devices
- Dynamic efficiency and performance improvement of electronic systems
Publications
Journals
Davis JJ, Hung E, Levine JM, et al., 2018, KAPow: High-accuracy, Low-overhead Online Per-module Power Estimation for FPGA Designs, Acm Transactions on Reconfigurable Technology and Systems, Vol:11, ISSN:1936-7406, Pages:2:1-2:22
Davis JJ, Levine JM, Stott EA, et al., 2017, KOCL: Power Self-awareness for Arbitrary FPGA-SoC-accelerated OpenCL Applications, Ieee Design and Test, Vol:34, ISSN:2168-2356, Pages:36-45
Conference
Davis J, Levine J, Stott E, et al., 2017, STRIPE: Signal Selection for Runtime Power Estimation, International Confererence on Field-programmable Logic and Applications (FPL) 2017, IEEE
Hung E, Davis JJ, Levine JM, et al., 2016, KAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA Designs, IEEE Symposium on Field-programmable Custom Computing Machines (FCCM) 2016, IEEE, Pages:56-63
Davis JJ, Hung E, Levine J, et al., 2016, Knowledge is Power: Module-level Sensing for Runtime Optimisation, ACM/SIGDA International Symposium on Field-programmable Gate Arrays (FPGA) 2016, ACM, Pages:276-276