Imperial College London


Faculty of EngineeringDepartment of Electrical and Electronic Engineering

Research Associate







Bessemer BuildingSouth Kensington Campus






Katarzyna Szostak has graduated her BSc. (Hons) in Electronics and Telecommunication in 2011 at Wroclaw University of Technology, Poland. There, she received the first training in micro- and nanofabrication and wrote the thesis on the subject of “Project and realization of concave structures with smooth sidewalls by etching of silicon in anisotropic and isotropic processes”. After that, she continued her education on master level studies at the same faculty, in the area of Microsystems, Electronics and Photonics, which she graduated in 2012 with distinction after defending dissertation about glass-to-glass anodic bonding through thin layers of polysilicon. During her second -level studies Katarzyna was awarded with 6-month research scholarship from Foundation of Polish Science to support work on novel dose-radiation sensor platform.

Meanwhile Katarzyna has attended several internships in VTT, Finland and IMEC, Belgium where she worked on changing etching behaviour of SOI wafers for a photonic integrated circuits and on graphene-based FET transistors, respectively. 

In 2013 Katarzyna joined AML Ltd. company in Harwell, UK as a Process Engineer, where her responsibilities focused around various bonding processes for a wide range of materials.

From the late 2013 until April 2015 Katarzyna worked at the Ilmenau University of Technology in Germany as a Research Associate. Her tasks were focused around clean - room microfabrication and characterization of novel, miniature spectrometers for air-quality sensing.

In August 2015 Katarzyna joined Neural Interfaces team at Imperial College London where she is currently working on new generation of the implantable neural interfaces within ENGINI project.

Research Interests

Microfabrication of implantable neuroengineering devices, micro- and nanofabrication, MEMS, bonding techniques, neural interfaces.



Szostak KM, Keshavarz M, Constandinou T, 2021, Hermetic chip-scale packaging using Au:Sn eutectic bonding for implantable devices, Journal of Micromechanics and Microengineering, ISSN:0960-1317

Szostak K, Grand L, Constandinou TG, 2017, Neural interfaces for intracortical recording: requirements, fabrication methods, and characteristics, Frontiers in Neuroscience, Vol:11, ISSN:1662-4548


Ahmadi N, Cavuto ML, Feng P, et al., 2019, Towards a distributed, chronically-implantable neural interface, 9th IEEE/EMBS International Conference on Neural Engineering (NER), IEEE, Pages:719-724, ISSN:1948-3546

Szostak KM, Constandinou TG, 2018, Hermetic packaging for implantable microsystems: effectiveness of sequentially electroplated AuSn alloy, 40th International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), IEEE

Leene L, Maslik M, Feng P, et al., 2018, Autonomous SoC for neural local field potential recording in mm-scale wireless implants, IEEE International Symposium on Circuits and Systems, IEEE, Pages:1-5, ISSN:2379-447X

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