Imperial College London

Dr Katarzyna Szostak-Lipowicz

Faculty of EngineeringDepartment of Electrical and Electronic Engineering

Visiting Researcher
 
 
 
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Contact

 

k.szostak

 
 
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Location

 

Bessemer BuildingSouth Kensington Campus

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Summary

 

Publications

Publication Type
Year
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6 results found

Szostak KM, Keshavarz M, Constandinou T, 2021, Hermetic chip-scale packaging using Au:Sn eutectic bonding for implantable devices, Journal of Micromechanics and Microengineering, Vol: 31, Pages: 1-13, ISSN: 0960-1317

Advancements in miniaturisation and new capabilities of implantable devices impose a need for the development of compact, hermetic, and CMOS-compatible micro packaging methods. Gold-tin-based eutectic bonding presents the potential for achieving low-footprint seals with low permeability to moisture at process temperatures below 350 compfnC. This work describes a method for the deposition of Au:Sn eutectic alloy frames by sequential electroplating from commercially available solutions. Frames were bonded on the chip-level in the process of eutectic bonding. Bond quality was characterised through shear force measurements, scanning electron microscopy, visual inspection, and immersion tests. Characterisation of seals geometry, solder thickness, and bonding process parameters was evaluated, along with toxicity assessment of bonding layers to the human fibroblast cells. With a successful bond yield of over 70% and no cytotoxic effect, Au:Sn eutectic bonding appears as a suitable method for the protection of integrated circuitry in implantable applications.

Journal article

Ahmadi N, Cavuto ML, Feng P, Leene LB, Maslik M, Mazza F, Savolainen O, Szostak KM, Bouganis C-S, Ekanayake J, Jackson A, Constandinou TGet al., 2019, Towards a distributed, chronically-implantable neural interface, 9th IEEE/EMBS International Conference on Neural Engineering (NER), Publisher: IEEE, Pages: 719-724, ISSN: 1948-3546

We present a platform technology encompassing a family of innovations that together aim to tackle key challenges with existing implantable brain machine interfaces. The ENGINI (Empowering Next Generation Implantable Neural Interfaces) platform utilizes a 3-tier network (external processor, cranial transponder, intracortical probes) to inductively couple power to, and communicate data from, a distributed array of freely-floating mm-scale probes. Novel features integrated into each probe include: (1) an array of niobium microwires for observing local field potentials (LFPs) along the cortical column; (2) ultra-low power instrumentation for signal acquisition and data reduction; (3) an autonomous, self-calibrating wireless transceiver for receiving power and transmitting data; and (4) a hermetically-sealed micropackage suitable for chronic use. We are additionally engineering a surgical tool, to facilitate manual and robot-assisted insertion, within a streamlined neurosurgical workflow. Ongoing work is focused on system integration and preclinical testing.

Conference paper

Szostak KM, Constandinou TG, 2018, Hermetic packaging for implantable microsystems: effectiveness of sequentially electroplated AuSn alloy, 40th International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), Publisher: IEEE

With modern microtechnology, there is an aggressive miniaturization of smart devices, despite an increasing level of integration and overall complexity. It is therefore becoming increasingly important to be achieve reliable, compact packaging. For implantable medical devices (IMDs), the package must additionally provide a high quality hermetic environmentto protect the device from the human body. For chip-scale devices, AuSn eutectic bonding offers the possibility of forming compact seals that achieve ultra-low permeability. A key feature is this can be achieved at process temperatures of below 350 C, therefore allowing for the integration of sensors and microsystems with CMOS electronics within a single package. Issueshowever such as solder wetting, void formation and controlling composition make formation of high-quality repeatable seals highly challenging. Towards this aim, this paper presents our experimental work characterizing the eutectic stack deposition. We detail our design methods and process flow, share our experiences in controlling electrochemical deposition of AuSnalloy and finally discuss usability of sequential electroplating process for the formation of hermetic eutectic bonds.

Conference paper

Leene L, Maslik M, Feng P, Szostak K, Mazza F, Constandinou TGet al., 2018, Autonomous SoC for neural local field potential recording in mm-scale wireless implants, IEEE International Symposium on Circuits and Systems, Publisher: IEEE, Pages: 1-5, ISSN: 2379-447X

Next generation brain machine interfaces fundamentally need to improve the information transfer rate and chronic consistency when observing neural activity over a long period of time. Towards this aim, this paper presents a novel System-on-Chip (SoC) for a mm-scale wireless neural recording node that can be implanted in a distributed fashion. The proposed self-regulating architecture allows each implant to operate autonomously and adaptively load the electromagnetic field to extract a precise amount of power for full-system operation. This can allow for a large number of recording sites across multiple implants extending through cortical regions without increased control overhead in the external head-stage. By observing local field potentials (LFPs) only, chronic stability is improved and good coverage is achieved whilst reducing the spatial density of recording sites. The system features a ΔΣ based instrumentation circuit that digitises high fidelity signal features at the sensor interface thereby minimising analogue resource requirements while maintaining exceptional noise efficiency. This has been implemented in a 0.35 μm CMOS technology allowing for wafer-scale post-processing for integration of electrodes, RF coil, electronics and packaging within a 3D structure. The presented configuration will record LFPs from 8 electrodes with a 825 Hz bandwidth and an input referred noise figure of 1.77μVrms. The resulting electronics has a core area of 2.1 mm2 and a power budget of 92 μW

Conference paper

Szostak K, Grand L, Constandinou TG, 2017, Neural interfaces for intracortical recording: requirements, fabrication methods, and characteristics, Frontiers in Neuroscience, Vol: 11, ISSN: 1662-4548

Implantable neural interfaces for central nervous system research have been designed with wire, polymer or micromachining technologies over the past 70 years. Research on biocompatible materials, ideal probe shapes and insertion methods has resulted in building more and more capable neural interfaces. Although the trend is promising, the long-term reliability of such devices has not yet met the required criteria for chronic human application. The performance of neural interfaces in chronic settings often degrades due to foreign body response to the implant that is initiated by the surgical procedure, and related to the probe structure, and material properties used in fabricating the neural interface. In this review, we identify the key requirements for neural interfaces for intracortical recording, describe the three different types of probes- microwire, micromachined and polymer-based probes; their materials, fabrication methods, and discuss their characteristics and related challenges.

Journal article

Szostak K, Mazza F, Maslik M, Feng P, Leene L, Constandinou TGet al., 2017, Microwire-CMOS Integration of mm-Scale Neural Probes for Chronic Local Field Potential Recording, IEEE Biomedical Circuits and Systems (BioCAS) Conference, Publisher: IEEE, Pages: 492-495

Conference paper

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