Imperial College London

Professor Peter Y. K. Cheung

Faculty of EngineeringDyson School of Design Engineering

Head of the Dyson School of Design Engineering
 
 
 
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Contact

 

+44 (0)20 7594 6200p.cheung Website

 
 
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Assistant

 

Mrs Wiesia Hsissen +44 (0)20 7594 6261

 
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Location

 

910BElectrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Bouganis:2007,
author = {Bouganis, C and Pournara, I and Cheung, PYK},
pages = {141--150},
title = {Efficient Mapping of Dimensionality Reduction Designs onto Heterogeneous FPGAs},
year = {2007}
}

RIS format (EndNote, RefMan)

TY  - CPAPER
AU - Bouganis,C
AU - Pournara,I
AU - Cheung,PYK
EP - 150
PY - 2007///
SP - 141
TI - Efficient Mapping of Dimensionality Reduction Designs onto Heterogeneous FPGAs
ER -