Imperial College London

Professor Peter Y. K. Cheung

Faculty of EngineeringDyson School of Design Engineering

Head of the Dyson School of Design Engineering
 
 
 
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Contact

 

+44 (0)20 7594 6200p.cheung Website

 
 
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Assistant

 

Mrs Wiesia Hsissen +44 (0)20 7594 6261

 
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Location

 

910BElectrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Turkington:2008,
author = {Turkington, KJ and Constantinides, GA and Masselos, K and Cheung, PYK},
pages = {1--8},
title = {Co-optimisation of Datapath and Memory in Outer Loop Pipelining},
year = {2008}
}

RIS format (EndNote, RefMan)

TY  - CPAPER
AU - Turkington,KJ
AU - Constantinides,GA
AU - Masselos,K
AU - Cheung,PYK
EP - 8
PY - 2008///
SP - 1
TI - Co-optimisation of Datapath and Memory in Outer Loop Pipelining
ER -