Imperial College London

Professor Peter Y. K. Cheung

Faculty of EngineeringDyson School of Design Engineering

Head of the Dyson School of Design Engineering
 
 
 
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Contact

 

+44 (0)20 7594 6200p.cheung Website

 
 
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Assistant

 

Mrs Wiesia Hsissen +44 (0)20 7594 6261

 
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Location

 

910BElectrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Sedcole:2007,
author = {Sedcole, P and Cheung, PYK},
pages = {178--187},
publisher = {ASSOC COMPUTING MACHINERY},
title = {Parametric Yield in FPGAs Due to Within-die Delay Variations: A Quantitative Analysis},
url = {http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000268330100022&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=1ba7043ffcc86c417c072aa74d649202},
year = {2007}
}

RIS format (EndNote, RefMan)

TY  - CPAPER
AU - Sedcole,P
AU - Cheung,PYK
EP - 187
PB - ASSOC COMPUTING MACHINERY
PY - 2007///
SP - 178
TI - Parametric Yield in FPGAs Due to Within-die Delay Variations: A Quantitative Analysis
UR - http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000268330100022&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=1ba7043ffcc86c417c072aa74d649202
ER -