Imperial College London

Professor Peter Y. K. Cheung

Faculty of EngineeringDyson School of Design Engineering

Head of the Dyson School of Design Engineering
 
 
 
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Contact

 

+44 (0)20 7594 6200p.cheung Website

 
 
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Assistant

 

Mrs Wiesia Hsissen +44 (0)20 7594 6261

 
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Location

 

910BElectrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@article{Powell:2013:10.1016/j.sysarc.2013.08.003,
author = {Powell, A and Savvas-Bouganis, C and Cheung, PYK},
doi = {10.1016/j.sysarc.2013.08.003},
journal = {JOURNAL OF SYSTEMS ARCHITECTURE},
pages = {1144--1156},
title = {High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration},
url = {http://dx.doi.org/10.1016/j.sysarc.2013.08.003},
volume = {59},
year = {2013}
}

RIS format (EndNote, RefMan)

TY  - JOUR
AU - Powell,A
AU - Savvas-Bouganis,C
AU - Cheung,PYK
DO - 10.1016/j.sysarc.2013.08.003
EP - 1156
PY - 2013///
SN - 1383-7621
SP - 1144
TI - High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration
T2 - JOURNAL OF SYSTEMS ARCHITECTURE
UR - http://dx.doi.org/10.1016/j.sysarc.2013.08.003
UR - http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000330201800004&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=1ba7043ffcc86c417c072aa74d649202
VL - 59
ER -