Publications
349 results found
Campregher N, Cheung PYK, Constantinides GA, et al., 2005, Yield modelling and yield enhancement for FPGAs using fault tolerance schemes, International Conference on Field Programmable Logic and Applications, 24 - 26 August 2005, Publisher: IEEE, Pages: 409-414
Hey LA, Cheung PYK, Gellman M, 2005, FPGA based router for cognitive packet networks, New York, IEEE international conference on field programmable technology, 11 - 14 December 2005, Singapore, SINGAPORE, Publisher: Ieee, Pages: 331-332
Cope B, Cheung PYK, Luk W, et al., 2005, Have GPUs made FPGAs redundant in the field of video processing?, New York, IEEE international conference on field programmable technology, 11 - 14 December 2005, Singapore, SINGAPORE, Publisher: Ieee, Pages: 111-118
Cheung RCC, Luk W, Cheung PYK, 2005, Reconfigurable elliptic curve cryptosystems on a chip, Los Alamitos, Design, automation and test in europe conference and exhibition (DATE 05), Munich, Germany, 7 - 11 March 2005, Publisher: IEEE Computer Soc, Pages: 24-29
Smith AM, Constantinides GA, Cheung PYK, 2005, PhD Forum: exploration of heterogeneous reconfigurable architectures, Field-programmable logic and applications
Ewe TE, Cheung PYK, Constantinides GA, 2005, Error modelling of dual fixed-point arithmetic and its application in Field Programmable Logic, 15th international conference on field programmable logic and applications, Tampere, Finland, 24 - 26 August 2005, Publisher: (?IEEE), Pages: 124-129
Wiangtong T, Cheung PYK, Luk W, 2005, A unified codesign environment for the UltraSONIC reconfigurable computer, New algorithms, architectures and applications for reconfigurable computing, Editors: Lysaught, Rosentiel, Pages: 81-92, ISBN: 9781402031274
Bouganis CS, Constantinides GA, Cheung PYK, 2005, A novel 2D filter design methodology for heterogeneous devices, Los Alamitos, Proceedings of the 13th annual IEEE international symposium on field-programmable custom computing machines (FCCM'05), 18 - 20 April 2005, Napa, CA, Publisher: Ieee, Pages: 13-22
Sidahao N, Constantinides GA, Cheung PYK, 2005, A Heuristic Approach for Multiple Restricted Multiplication, Pages: 692-695
Fahmy SA, Cheung PYK, Luk W, 2005, Hardware acceleration of hidden Markov model decoding for person detection, Los Alamitos, Design, automation and test in europe conference and exhibition (Date 05), Munich, Germany, 7 - 11 March 2005, Publisher: IEEE Computer Soc, Pages: 8-13
Cheung RCC, Luk W, Cheung PYK, 2005, Reconfigurable elliptic curve cryptosystems on a chip, Los Alamitos, Design, automation and test in europe conference and exhibition (DATE 05), Munich, Germany, 7 - 11 March 2005, Publisher: IEEE Computer Soc, Pages: 24-29
Lee DU, Luk W, Villasenor J, et al., 2005, The effects of polynomial degrees, New algorithms, architectures and applications for reconfigurable computing: 13th international conference on Field-programmable logic and applications, Lisbon, September 2003, Pages: 301-313
Bouganis CS, Constantinides GA, Cheung PYK, 2005, A novel 2D filter design methodology, Proceedings of IEEE international symposium on circuits and systems, Kobe, Japan, 23 - 26 May 2005, Publisher: IEEE, Pages: 532-535
Lee DU, Luk W, Villasenor JD, et al., 2004, A Gaussian noise generator for hardware-based simulations, IEEE TRANSACTIONS ON COMPUTERS, Vol: 53, Pages: 1523-1534, ISSN: 0018-9340
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- Citations: 49
Gause J, Cheung PYK, Luk W, 2004, Reconfigurable computing for shape-adaptive video processing, IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, Vol: 151, Pages: 313-320, ISSN: 1350-2387
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- Citations: 7
Luk W, Cheung PYK, Seng SP, 2004, Flexible Instruction Processor Systems and Methods, US 7543283
The present invention relates to the design-time and run-time environments of instruction processors implemented in reprogrammable hardware. In one aspect the present invention provides a design system for generating configuration information and associated executable code base on a customization specification, which includes application information including application source code and customization information including design constraints, for implementing an instruction processor using re-progammable hardware, the system comprising: a template generator; an analyzer; a compiler; an instantiator, and a builder. In another aspect the present invention provides a management system for managing run-time re-configuration of an instruction processor implemented using re-progrannnable hardware, comprising: a configuration library; a code library; a loader; a loader controller; a run-time monitor; an optimization determiner; and an optimization instructor.
Sim CTY, Toumazou C, Cheung PYK, 2004, Ratiometric current-mode rational DAC, ELECTRONICS LETTERS, Vol: 40, Pages: 409-410, ISSN: 0013-5194
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- Citations: 1
Cheung RCC, Brown A, Luk W, et al., 2004, A scalable hardware architecture for prime number validation, 3rd International Conference on Field-Programmable Technology, Publisher: IEEE, Pages: 177-184
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- Citations: 7
Melis WJC, Cheung PYK, Luk W, 2004, Autonomous memory block for reconfigurable computing, New York, IEEE international symposium on circuits and systems, Vancouver, Canada, 23 - 26 May 2004, Publisher: IEEE, Pages: 581-584
Melis WJC, Cheung PYK, Luk W, 2004, Scalable structured data access by combining autonomous memory blocks, New York, 3rd international conference on field-programmable technology, University of Queensland, Brisbane, Australia, 6 - 8 December 2004, Publisher: IEEE, Pages: 457-460
Ewe CT, Cheung PYK, Constantinides GA, 2004, Dual fixed-point: an efficient alternative to floating-point computation, Berlin, 14th international conference on field-programmable logic and applications, Leuven, Belgium, 30 August - 1 September 2004, Publisher: Springer-Verlag Berlin, Pages: 200-208
Sedcole P, Cheung PYK, Constantinides GA, et al., 2004, A structured methodology for system-on-an-FPGA design, Berlin, 14th international conference on field-programmable logic and applications, Leuven, Belgium, 30 August - 1 September 2004, Publisher: Springer-Verlag Berlin, Pages: 1047-1051
Sidahao N, Constantinides GA, Cheung PYK, 2004, Multiple restricted multiplication, Berlin, 14th international conference on field-programmable logic and applications, Leuven, Belgium, 30 August - 1 September 2004, Publisher: Springer-Verlag Berlin, Pages: 374-383
Morris GW, Constantinides GA, Cheung PYK, 2004, Migrating functionality from ROMs to embedded multipliers, Los Alamitos, 12th annual IEEE symposium on field-programmable custom computing machines, Napa, CA, 20 - 23 April 2004, Publisher: IEEE Computer Soc, Pages: 287-288
Rissa T, Cheung PYK, Luk W, 2004, SoftSONIC: a customisable modular platform for video applications, Berlin, 14th international conference on field-programmable logic and applications, Leuven, Belgium, Publisher: Springer-Verlag, Pages: 54-63
Constantinides GA, Cheung PYK, Luk W, 2004, Synthesis and optimization of DSP algorithms, London, Publisher: Kluwer Academic Publishers, ISBN: 9781402079306
Rissa T, Cheung PYK, Luk W, 2004, SoftSONIC: a customisable modular platform for video applications, Berlin, 14th international conference on field-programmable logic and applications, Leuven, Belgium, 30 August - 1 September 2004, Publisher: Springer-Verlag Berlin, Pages: 54-63
Morris GW, Constantinides GA, Cheung PYK, 2004, Applying word length optimisation to ROM emulation, Proceedings of IEE seminar on system on chip design, test, and techology, Pages: 1-6
Ewe CT, Cheung PYK, Constantinides GA, 2004, Dual Fixed Point: An Efficient Alternative to Floating Point Computation, Pages: 200-208
Rissa T, Luk W, Cheung PYK, 2004, Automated combination of simulation and hardware prototyping, Athens, International conference on engineering of reconfigurable systems and algorithms (ERSA 04), Las Vegas, NV, 2004, Publisher: C S R e A Press, Pages: 184-193
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