Publications
189 results found
Murray K, Stiemerling T, Wilkinson T, et al., 1994, Angel: Resource Unification in a 64-bit Micro-Kernel, Proceedings of 27th Hawaii International Conference on Systems Science
Bennett AJ, Kelly PHJ, Paterson R, 1994, Derivation and Performance of a Pipelined Transaction Processor, IEEE Symposium on Parallel and Distributed Processing, Dallas, Publisher: IEEE Press
Bennett AJ, Kelly PHJ, 1993, Locality and false sharing in coherent-cache parallel graph reduction, Pages: 329-340, ISSN: 0302-9743
Parallel graph reduction is a model for parallel program execution in which shared-memory is used under a strict access regime with single assignment and blocking reads. We outline the design of an efficient and accurate multiprocessor simulation scheme and the results of a simulation study of the performance of a suite of benchmark programs operating under a cache coherency protocol that is representative of protocols used in commercial shared-memory machines and in more scalable distributed shared-memory systems. We analyse the influence of cache line size on performance and expose the relative contributions of spatial, temporal and processor locality and false sharing to overall performance.
Darlington D, Field A J, Harrison P G, et al., 1993, Parallel Programming Using Skeleton Functions, PARLE'93: Parallel Architectures and Languages Europe, Publisher: Springer LNCS, Pages: 146-160
Murray K A, Saulsbury A, Stiemerling T, et al., 1993, Design and Implementation of an Object-Orientated 64-bit Single Address Space Microkernel, 2nd USENIX Symposium on Microkernels and other Kernel Architectures, Publisher: Usenix
Bolton D, Hankin C L, Kelly, et al., 1991, An Operational Semantics for Paragon: A Design Notation for Parallel Architectures, New Generation Computing, Vol: 9, Pages: 171-197
Bolton D, Hankin C L, Kelly, et al., 1990, Parallel object-oriented descriptions of graph reduction machines, Fifth Generation Computer Systems, Vol: 6
Anderson P, Kelly, P H J, et al., 1990, The Feasibility of a general-purpose parallel computer using WSI, Fifth Generation Computer Systems, Vol: 6, Pages: 241-253
Kelly, P H J, 1989, Functional Programming for Loosely-coupled Multiprocessors, Publisher: Pitman/MIT Press
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