14 results found
Mifsud A, Shen J, Feng P, et al., 2022, A CMOS-based characterisation platform for emerging RRAM technologies, 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, Pages: 75-79
Mass characterisation of emerging memory devices is an essential step in modelling their behaviour for integration within a standard design flow for existing integrated circuit designers. This work develops a novel characterisation platform for emerging resistive devices with a capacity of up to 1 million devices on-chip. Split into four independent sub-arrays, it contains on-chip column-parallel DACs for fast voltage programming of the DUT. On-chip readout circuits with ADCs are also available for fast read operations covering 5-decades of input current (20nA to 2mA). This allows a device’s resistance range to be between 1kΩ and 10MΩ with a minimum voltage range of ±1.5V on the device.
Savolainen O, Zhang Z, Feng P, et al., 2022, Hardware-efficient compression of neural multi-unit activity, IEEE Access, Vol: 10, Pages: 117515-117529, ISSN: 2169-3536
Brain-machine interfaces (BMI) are tools for measuring neural activity in the brain, used to treat numerous conditions. It is essential that the next generation of intracortical BMIs is wireless so as to remove percutaneous connections, i.e. wires, and the associated mechanical and infection risks. This is required for the effective translation of BMIs into clinical applications and is one of the remaining bottlenecks. However, due to cortical tissue thermal dissipation safety limits, the on-implant power consumption must be strictly limited. Therefore, both the neural signal processing and wireless communication power should be minimal, while the implants should provide signals that offer high behavioural decoding performance (BDP). The Multi-Unit Activity (MUA) signal is the most common signal in modern BMIs. However, with an ever-increasing channel count, the raw data bandwidth is becoming prohibitively high due to the associated communication power exceeding the safety limits. Data compression is therefore required. To meet this need, this work developed hardware-efficient static Huffman compression schemes for MUA data. Our final system reduced the bandwidth to 27 bps/channel, compared to the standard MUA rate of 1 kbps/channel. This compression is over an order of magnitude more than has been achieved before, while using only 0.96 uW/channel processing power and 246 logic cells. Our results were verified on 3 datasets and less than 1% loss in BDP was observed. As such, with the use of effective data compression, an order more of MUA channels can be fitted on-implant, enabling the next generation of high-performance wireless intracortical BMIs.
Savolainen OW, Zhang Z, Feng P, et al., 2022, Hardware-Efficient Compression of Neural Multi-Unit Activity
<jats:title>Abstract</jats:title><jats:p>Brain-machine interfaces (BMI) are tools for treating neurological disorders and motor-impairments. It is essential that the next generation of intracortical BMIs is wireless so as to remove percutaneous connections, i.e. wires, and the associated mechanical and infection risks. This is required for the effective translation of BMIs into clinical applications and is one of the remaining bottlenecks. However, due to cortical tissue thermal dissipation safety limits, the on-implant power consumption must be strictly limited. Therefore, both the neural signal processing and wireless communication power should be minimal, while the implants should provide signals that offer high behavioural decoding performance (BDP). The Multi-Unit Activity (MUA) signal is the most common signal in modern BMIs. However, with an ever-increasing channel count, the raw data bandwidth is becoming prohibitively high due to the associated communication power exceeding the safety limits. Data compression is therefore required. To meet this need, this work developed hardware-efficient static Huffman compression schemes for MUA data. Our final system reduced the bandwidth to 27 bps/channel, compared to the standard MUA rate of 1 kbps/channel. This compression is over an order of magnitude more than has been achieved before, while using only 0.96 uW/channel processing power and 246 logic cells. Our results were verified on 3 datasets and less than 1% loss in BDP was observed. As such, with the use of effective data compression, an order more of MUA channels can be fitted on-implant, enabling the next generation of high-performance wireless intracortical BMIs.</jats:p>
Antoniadis D, Mifsud A, Feng P, et al., 2022, An Open-Source RRAM Compiler, 2022 20TH IEEE INTERREGIONAL NEWCAS CONFERENCE (NEWCAS), Pages: 465-469
Antoniadis DD, Feng P, Mifsud A, et al., 2021, Open-source memory compiler for automatic RRAM generation and verification, 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Publisher: IEEE, Pages: 97-100
The lack of open-source memory compilers in academia typically causes significant delays in research and design implementations. This paper presents an open-source memory compiler that is directly integrated within the Cadence Virtuoso environment using physical verification tools provided by Mentor Graphics (Calibre). It facilitates the entire memory generation process from netlist generation to layout implementation, and physical implementation verification. To the best of our knowledge, this is the first open-source memory compiler that has been developed specifically to automate Resistive Random Access Memory (RRAM) generation. RRAM holds the promise of achieving high speed, high density and non-volatility. A novel RRAM architecture, additionally is proposed, and a number of generated RRAM arrays are evaluated to identify their worst case control line parasitics and worst case settling time across the memristors of their cells. The total capacitance of lines SEL, N and P is 5.83 fF/cell, 3.31 fF/cell and 2.48 fF/cell respectively, while the total calculated resistance for SEL is 1.28 Ω/cell and 0.14 Ω/cell for both N and P lines.
Feng P, Constandinou TG, 2021, Autonomous Wireless System for Robust and Efficient Inductive Power Transmission to Multi-Node Implants, IEEE International Symposium on Circuits and Systems (IEEE ISCAS), Publisher: IEEE, ISSN: 0271-4302
Feng P, Constandinou TG, 2021, Autonomous Wireless System for Robust and Efficient Inductive Power Transmission to Multi-Node Implants, Publisher: Cold Spring Harbor Laboratory
<jats:title>Abstract</jats:title><jats:p>A number of recent and current efforts in brain machine interfaces are developing millimetre-sized wireless implants that achieve scalability in the number of recording channels by deploying a distributed ‘swarm’ of devices. This trend poses two key challenges for the wireless power transfer: (1) the system as a whole needs to provide sufficient power to all devices regardless of their position and orientation; (2) each device needs to maintain a stable supply voltage autonomously. This work proposes two novel strategies towards addressing these challenges: a scalable resonator array to enhance inductive networks; and a self-regulated power management circuit for use in each independent mm-scale wireless device. The proposed passive 2-tier resonant array is shown to achieve an 11.9% average power transfer efficiency, with ultra-low variability of 1.77% across the network.</jats:p><jats:p>The self-regulated power management unit then monitors and autonomously adjusts the supply voltage of each device to lie in the range between 1.7 V-1.9 V, providing both low-voltage and over-voltage protection.</jats:p>
Feng P, Maslik M, Constandinou T, 2019, EM-lens enhanced power transfer and multi-node data transmission for implantable medical devices, IEEE Biomedical Circuits and Systems (BioCAS) Conference, Publisher: IEEE, Pages: 1-4
This paper presents a robust EM-lens-enhancedwireless power transmission system and a novel multiple-nodedata communication method for distributed implantable medicaldevices. The proposed techniques can solve the common issuescaused by multiple implanted devices, such as low power transferefficiency through biological tissues, uneven delivered powerfor distributed devices and interference between simultaneouswireless power and data transmission. A prototype system hasbeen manufactured with discrete components on FR4 substrateas a proof of concept. The EM-Lens-enhanced inductive linkscan expand the power coverage of transmitting (Tx) coil from9 mm×5 mm to 14 mm×13 mm, and double the recovered DCvoltage from 1.8 V to 3.2 V at 12.5 mm distance. Data commu-nication is achieved by novel low-power back-scattering CDMAscheme. This permits transmission of data from several nodesall operating with the same carrier frequency simultaneouslyreflecting the power carriers to the primary side. In this paper,we demonstrate simultaneous communication between two nodesat 125 kbps with 1.05 mW power consumption.
Ahmadi N, Cavuto ML, Feng P, et al., 2019, Towards a distributed, chronically-implantable neural interface, 9th IEEE/EMBS International Conference on Neural Engineering (NER), Publisher: IEEE, Pages: 719-724, ISSN: 1948-3546
We present a platform technology encompassing a family of innovations that together aim to tackle key challenges with existing implantable brain machine interfaces. The ENGINI (Empowering Next Generation Implantable Neural Interfaces) platform utilizes a 3-tier network (external processor, cranial transponder, intracortical probes) to inductively couple power to, and communicate data from, a distributed array of freely-floating mm-scale probes. Novel features integrated into each probe include: (1) an array of niobium microwires for observing local field potentials (LFPs) along the cortical column; (2) ultra-low power instrumentation for signal acquisition and data reduction; (3) an autonomous, self-calibrating wireless transceiver for receiving power and transmitting data; and (4) a hermetically-sealed micropackage suitable for chronic use. We are additionally engineering a surgical tool, to facilitate manual and robot-assisted insertion, within a streamlined neurosurgical workflow. Ongoing work is focused on system integration and preclinical testing.
Feng P, Constandinou TG, 2018, Robust wireless power transfer to multiple mm-scale freely-positioned Neural implants, IEEE Biomedical Circuits and Systems (BioCAS) Conference 2018, Publisher: IEEE, Pages: 363-366
This paper presents a novel wireless power transfer(WPT) scheme that consists of a two-tier hierarchy of near-field inductively coupled links to provide efficient power transferefficiency (PTE) and uniform energy distribution for mm-scalefree-positioned neural implants. The top tier facilitates a tran-scutaneous link from a scalp-worn (cm-scale) primary coil toa subcutaneous array of smaller, parallel-connected secondarycoils. These are then wired through the skull to a correspondingset of parallel connected primary coils in the lower tier, placedepidurally. These then inductively couple to freely positioned(mm-scale) secondary coils within each subdural implant. Thisarchitecture has three key advantages: (1) the opportunity toachieve efficient energy transfer by utilising two short-distanceinductive links; (2) good uniformity of the transdural powerdistribution through the multiple (redundant) coils; and (3) areduced risk of infection by maintaining the dura protecting theblood-brain barrier. The functionality of this approach has beenverified and optimized through HFSS simulations, to demonstratethe robustness against positional and angular misalignment. Theaverage 11.9% PTE and 26.6% power distribution deviation(PDD) for horizontally positioned Rx coil and average 2.6% PTEand 62.8% power distribution deviation for the vertical Rx coilhave been achieved.
Feng P, Yeon P, Cheng Y, et al., 2018, Chip-scale coils for millimeter-sized bio-implants, IEEE Transactions on Biomedical Circuits and Systems, Vol: 12, Pages: 1088-1099, ISSN: 1932-4545
Next generation implantable neural interfaces are targeting devices with mm-scale form factors that are freely floating and completely wireless. Scalability to more recording (or stimulation) channels will be achieved through distributing multiple devices, instead of the current approach that uses a single centralized implant wired to individual electrodes or arrays. In this way, challenges associated with tethers, micromotion and reliability of wiring is mitigated. This concept is now being applied to both central and peripheral nervous system interfaces. One key requirement, however, is to maximize SAR-constrained achievable wireless power transfer efficiency (PTE) of these inductive links with mm-sized receivers. Chip-scale coil structures for microsystem integration that can provide efficient near-field coupling are investigated. We develop near-optimal geometries for three specific coil structures: “in-CMOS”, “above-CMOS” (planar coil post-fabricated on a substrate) and “around-CMOS” (helical wirewound coil around substrate). We develop analytical and simulation models that have been validated in air and biological tissues by fabrications and experimentally measurements. Specifically, we prototype structures that are constrained to a 4mm x 4mm silicon substrate i.e. the planar in-/above-CMOS coils have outer diameter <4mm, whereas the around-CMOS coil has inner diameter of 4mm. The in-CMOS and above-CMOS coils have metal film thicknesses of 3μm aluminium and 25μm gold, respectively, whereas the around-CMOS coil is fabricated by winding a 25μm gold bonding-wire around the substrate. The measured quality factors (Q) of the mm-scale Rx coils are 10.5 @450.3MHz (in-CMOS), 24.61 @85MHz (above-CMOS), and 26.23 @283MHz (around-CMOS). Also, PTE of 2-coil links based on three types of chip-scale coils is measured in air and tissue environment to demonstrate tissue loss for bio-implants. The SAR-constrained maximum PTE are
Leene L, Maslik M, Feng P, et al., 2018, Autonomous SoC for neural local field potential recording in mm-scale wireless implants, IEEE International Symposium on Circuits and Systems, Publisher: IEEE, Pages: 1-5, ISSN: 2379-447X
Next generation brain machine interfaces fundamentally need to improve the information transfer rate and chronic consistency when observing neural activity over a long period of time. Towards this aim, this paper presents a novel System-on-Chip (SoC) for a mm-scale wireless neural recording node that can be implanted in a distributed fashion. The proposed self-regulating architecture allows each implant to operate autonomously and adaptively load the electromagnetic field to extract a precise amount of power for full-system operation. This can allow for a large number of recording sites across multiple implants extending through cortical regions without increased control overhead in the external head-stage. By observing local field potentials (LFPs) only, chronic stability is improved and good coverage is achieved whilst reducing the spatial density of recording sites. The system features a ΔΣ based instrumentation circuit that digitises high fidelity signal features at the sensor interface thereby minimising analogue resource requirements while maintaining exceptional noise efficiency. This has been implemented in a 0.35 μm CMOS technology allowing for wafer-scale post-processing for integration of electrodes, RF coil, electronics and packaging within a 3D structure. The presented configuration will record LFPs from 8 electrodes with a 825 Hz bandwidth and an input referred noise figure of 1.77μVrms. The resulting electronics has a core area of 2.1 mm2 and a power budget of 92 μW
Szostak K, Mazza F, Maslik M, et al., 2017, Microwire-CMOS Integration of mm-Scale Neural Probes for Chronic Local Field Potential Recording, IEEE Biomedical Circuits and Systems (BioCAS) Conference, Publisher: IEEE, Pages: 492-495
Feng P, Constandinou TG, Yeon P, et al., 2017, Millimeter-Scale Integrated and Wirewound Coils for Powering Implantable Neural Microsystems, IEEE Biomedical Circuits and Systems (BioCAS) Conference, Pages: 488-491
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