Imperial College London

ProfessorPeterPietzuch

Faculty of EngineeringDepartment of Computing

Professor of Distributed Systems
 
 
 
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Contact

 

+44 (0)20 7594 8314prp Website

 
 
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Location

 

442Huxley BuildingSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Pietzuch:2016:10.1145/2933267.2933291,
author = {Pietzuch, PR and Koliousis, A and Weidlich, M and Costa, P and Wolf, A and Castro, Fernandez R},
doi = {10.1145/2933267.2933291},
pages = {354--357},
publisher = {Association for Computing Machinery},
title = {Demo- The SABER system for window-based hybrid stream processing with GPGPUs},
url = {http://dx.doi.org/10.1145/2933267.2933291},
year = {2016}
}

RIS format (EndNote, RefMan)

TY  - CPAPER
AB - Heterogeneous architectures that combine multi-core CPUs withmany-core GPGPUs have the potential to improve the performanceof data-intensive stream processing applications. Yet, a stream pro-cessing engine must execute streaming SQL queries with sufficientdata-parallelism to fully utilise the available heterogeneous proces-sors, and decide how to use each processor in the most effectiveway. Addressing these challenges, we demonstrate SABER, ahybrid high-performance relational stream processing engine forCPUs and GPGPUs. SABER executes window-based streaming SQL queries in a data-parallel fashion and employs an adaptive scheduling strategy to balance the load on the different types of processors. To hidedata movement costs, SABER pipelines the transfer of stream databetween CPU and GPGPU memory. In this paper, we review thedesign principles of SABER in terms of its hybrid stream processingmodel and its architecture for query execution. We also present aweb front-end that monitors processing throughput.
AU - Pietzuch,PR
AU - Koliousis,A
AU - Weidlich,M
AU - Costa,P
AU - Wolf,A
AU - Castro,Fernandez R
DO - 10.1145/2933267.2933291
EP - 357
PB - Association for Computing Machinery
PY - 2016///
SP - 354
TI - Demo- The SABER system for window-based hybrid stream processing with GPGPUs
UR - http://dx.doi.org/10.1145/2933267.2933291
UR - http://hdl.handle.net/10044/1/41256
ER -