Imperial College London

Professor Themis Prodromakis

Faculty of EngineeringDepartment of Electrical and Electronic Engineering

Honorary Research Fellow
 
 
 
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Contact

 

+44 (0)20 7594 0840t.prodromakis Website

 
 
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Location

 

B422Bessemer BuildingSouth Kensington Campus

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Summary

 

Publications

Publication Type
Year
to

264 results found

Leung OM, Gordon LW, Messinger RJ, Prodromakis T, Wharton JA, Ponce de León C, Schoetz Tet al., 2024, Solid Polymer Electrolytes with Enhanced Electrochemical Stability for High-Capacity Aluminum Batteries, Advanced Energy Materials, Vol: 14, ISSN: 1614-6832

Chloroaluminate ionic liquids are commonly used electrolytes in rechargeable aluminum batteries due to their ability to reversibly electrodeposit aluminum at room temperature. Progress in aluminum batteries is currently hindered by the limited electrochemical stability, corrosivity, and moisture sensitivity of these ionic liquids. Here, a solid polymer electrolyte based on 1-ethyl-3-methylimidazolium chloride-aluminum chloride, polyethylene oxide, and fumed silica is developed, exhibiting increased electrochemical stability over the ionic liquid while maintaining a high ionic conductivity of ≈13 mS cm−1. In aluminum–graphite cells, the solid polymer electrolytes enable charging to 2.8 V, achieving a maximum specific capacity of 194 mA h g−1 at 66 mA g−1. Long-term cycling at 2.7 V showed a reversible capacity of 123 mA h g−1 at 360 mA g−1 and 98.4% coulombic efficiency after 1000 cycles. Solid-state nuclear magnetic resonance spectroscopy measurements reveal the formation of five-coordinate aluminum species that crosslink the polymer network to enable a high ionic liquid loading in the solid electrolyte. This study provides new insights into the molecular-level design and understanding of polymer electrolytes for high-capacity aluminum batteries with extended potential limits.

Journal article

Si Z, Wang C, Jiang X, Li Z, Huang G, Serb A, Prodromakis T, Wang S, Papavassiliou Cet al., 2023, Memristor-Assisted Background Calibration for SAR ADCs: A Feasibility Study, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol: 70, Pages: 3497-3508, ISSN: 1549-8328

Journal article

Tzouvadaki I, Gkoupidenis P, Vassanelli S, Wang S, Prodromakis Tet al., 2023, Interfacing Biology and Electronics with Memristive Materials., Adv Mater, Vol: 35

Memristive technologies promise to have a large impact on modern electronics, particularly in the areas of reconfigurable computing and artificial intelligence (AI) hardware. Meanwhile, the evolution of memristive materials alongside the technological progress is opening application perspectives also in the biomedical field, particularly for implantable and lab-on-a-chip devices where advanced sensing technologies generate a large amount of data. Memristive devices are emerging as bioelectronic links merging biosensing with computation, acting as physical processors of analog signals or in the framework of advanced digital computing architectures. Recent developments in the processing of electrical neural signals, as well as on transduction and processing of chemical biomarkers of neural and endocrine functions, are reviewed. It is concluded with a critical perspective on the future applicability of memristive devices as pivotal building blocks in bio-AI fusion concepts and bionic schemes.

Journal article

Prodromakis T, Papavassiliou C, Si Z, Serb A, Huang G, Wang Cet al., 2023, An improved data-driven memristor model accounting for sequences stimulus features, 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, ISSN: 2158-1525

The natural similarity between the emerging memristive technology and synapses makes memristor a promising device in the spiking input based neuromorphic systems. However, while asynchronous signal processing relies on memristor's response under the pulses stimulus, hardly any memristor models take the impact of sequences features on device behaviour into account. This paper proposes an optimized data-driven compact memristor model where the boundary of its internal state variable-resistive state (RS) is modelled with pulse amplitude and pulse width based on characterisation data. The model has been developed in Verilog-A and verified in Cadence Virtuoso Electronic Design Automation (EDA) tools. Based on the simulation, we further introduce a new concept “Effective Time Window”. Along with the observed pulse width modulated resistance, more potential circuit applications can be implemented based on a more realistic memristor switching behaviour.

Conference paper

Aitchison C, Halak B, Serb A, Prodromakis Tet al., 2023, A memristor fingerprinting and characterisation methodology for hardware security, SCIENTIFIC REPORTS, Vol: 13, ISSN: 2045-2322

Journal article

Panca A, Panidi J, Faber H, Stathopoulos S, Anthopoulos TD, Prodromakis Tet al., 2023, Flexible Oxide Thin Film Transistors, Memristors, and Their Integration, ADVANCED FUNCTIONAL MATERIALS, ISSN: 1616-301X

Journal article

Huang J, Serb A, Stathopoulos S, Prodromakis Tet al., 2023, Text classification in memristor-based spiking neural networks, NEUROMORPHIC COMPUTING AND ENGINEERING, Vol: 3

Journal article

Tzouvadaki I, Prodromakis T, 2023, Large-scale nano-biosensing technologies, FRONTIERS IN NANOTECHNOLOGY, Vol: 5

Journal article

Panca AG, Serb A, Stathopoulos S, Garlapati SK, Prodromakis Tet al., 2023, Automated RRAM measurements using a semi-Automated probe station and ArC ONE interface

Resistive Random Access Technology (RRAM) is quickly reaching industrial maturity. A key element towards achieving lasting commercial success, however, is automated testing; useful for performance benchmarking and rapid prototyping of new flavours of technology. Here we present a wafer-scale semi-Automated RRAM device testing platform.

Conference paper

Kraišniković C, Stathopoulos S, Prodromakis T, Legenstein Ret al., 2023, Fault Pruning: Robust Training of Neural Networks with Memristive Weights, Pages: 124-139, ISSN: 0302-9743

Neural networks with memristive memory for weights have been proposed as an energy-efficient solution for scaling up of neural network implementations. However, training such memristive neural networks is still challenging due to various memristor imperfections and faulty memristive elements. Such imperfections and faults are becoming increasingly severe as the density of memristor arrays increases in order to scale up weight memory. We propose fault pruning, a robust training scheme for memristive neural networks based on the idea to identify faulty memristive behavior on the fly during training and prune corresponding connections. We test this algorithm in simulations of memristive neural networks using both feed-forward and convolutional architectures on standard object recognition data sets. We show its ability to mitigate the detrimental effect of memristor faults on network training.

Conference paper

Maheshwari S, Wang J, Serb A, Prodromakis Tet al., 2023, A Memristor-based Tuneable Offset Comparator

In this work, we present the design of a dynamic latched comparator showing tuneability using the RRAM devices in the source terminal of the input nMOS transistors in 180nm CMOS technology. The memristor-based design has been compared with the conventional design (without RRAM) based on dynamic offset in the presence of mismatch, accuracy with noise, settling time and power consumption across process, voltage and temperature (PVT) variations. The RRAM-based design demonstrates a wide range of dynamic offset spanning from - 345mV to +V_DD/2 (no crossover detected). The noise simulation results in a shift of -122µ V compared to the conventional design which can be compensated using the RRAM devices. For different resistive states and PVT variations, a wide range of power dissipation was seen. For unbalanced resistive states, the power consumption is \approx7% at FF', \approx2.5% at 'TT' and \approx0.5% at 'SS' less in comparison to the conventional design. It can be seen that the RRAM-based dynamic comparator has significantly established a wide range of tuneability, can compensate for changes arising due to process and mismatches and increase accuracy and reliability in comparison to the conventional design.

Conference paper

Aitchison C, Halak B, Serb A, Prodromakis Tet al., 2023, A PUF Based on the Non-Linearity of Memristors, Pages: 558-563

As autonomous devices are increasingly used in security and safety-critical applications the security of the systems they comprise is of increasing concern. In such situations it is important that devices can be securely identified and trusted. When an IC or device is in the supply chain, or in the field, the lack of control over actors who can obtain physical access can compromise the trust and overall security of a system. Counterfeit chips may be incorporated into the device, compromising reliability or security. Additionally, for implemented devices, keys stored on-device may be copied by a bad actor. To help improve the security of such devices this paper proposes a new physical unclonable function (PUF) architecture, based on a TiOx memristor-based resistive memory (RRAM), that exploits the inherent analogue non-linearity in resistance of some memristor technologies. By directly exploiting non-linearity of memristor cells, rather than relying on the devices' absolute resistance at a single test voltage, a multi-bit-per-comparison PUF is created. As the architecture directly exploits cells' non-linearity, an additional source of hard-to-clone entropy is incorporated.

Conference paper

Agwa S, Prodromakis T, 2023, Bent-Pyramid: Towards A Quasi-Stochastic Data Representation for AI Hardware

The applications of the Artificial Intelligence have been increasingly used with huge datasets for many purposes. The beyond Von Neumann architectures (like digital and analog in-memory computing) are proposed to mitigate the data-movement bottleneck. However, they are struggling with the limitations of the conventional data representations: either the computation complexity of the digital binary domain or the interfacing and scalability issues of the analog domain; Meanwhile, the stochastic computing domain suffers from the generation complexity bottleneck which degrades the benefits of its computation simplicity. This paper presents a new Bent-Pyramid system which acts as a quasi-stochastic data representation. The new Bent-Pyramid system utilizes two complementary fixed sets of bitstreams to perform deterministic multiplication. The Bent-Pyramid inherits the same multiplication simplicity of the stochastic computing while avoiding the stochastic number generation complexity. The Vector-Matrix Multiplication benchmarking shows that the 10bit Bent-Pyramid system has a comparable accuracy to the 16bit stochastic computing. The generation circuit of the 10-bit Bent-Pyramid reduces the energy and the latency of the 16-bit stochastic counterpart by 15.15x and 16.0x respectively.

Conference paper

Agwa S, Papandroulidakis G, Prodromakis T, 2023, A 1T1R+2T Analog Content-Addressable Memory Pixel for Online Template Matching, ISSN: 0271-4310

The template matching approach has a promising momentum to build energy-efficient edge classifiers for var-ious implantable and wearable medical devices. To mitigate the analog/digital cross-domain interfacing complexity, analog content-addressable memories can be used efficiently to form the back-end classifiers by receiving the analog inputs and generating the digital classification outputs. This paper presents a novel memristor-based analog content-addressable memory pixel 1TIR+2T with 2.0x smaller footprint than its counterparts in the literature. The new compact pixel utilizes only one RRAM device through a 1T1R voltage divider circuit while exploiting the complementary behavior of the nMOS and pMOS transistors to determine the lower and upper bounds of the matching voltage range. The simulation results show that the 1T1R+2T pixel has a promising tunability with matching windows range from 50 mV to 200 mV according to the RRAM resistance value of the 1T1R voltage divider.

Conference paper

Agwa S, Prodromakis T, 2023, Digital in-memory stochastic computing architecture for vector-matrix multiplication, Frontiers in Nanotechnology, Vol: 5

The applications of the Artificial Intelligence are currently dominating the technology landscape. Meanwhile, the conventional Von Neumann architectures are struggling with the data-movement bottleneck to meet the ever-increasing performance demands of these data-centric applications. Moreover, The vector-matrix multiplication cost, in the binary domain, is a major computational bottleneck for these applications. This paper introduces a novel digital in-memory stochastic computing architecture that leverages the simplicity of the stochastic computing for in-memory vector-matrix multiplication. The proposed architecture incorporates several new approaches including a new stochastic number generator with ideal binary-to-stochastic mapping, a best seeding approach for accurate-enough low stochastic bit-precisions, a hybrid stochastic-binary accumulation approach for vector-matrix multiplication, and the conversion of conventional memory read operations into on-the-fly stochastic multiplication operations with negligible overhead. Thanks to the combination of these approaches, the accuracy analysis of the vector-matrix multiplication benchmark shows that scaling down the stochastic bit-precision from 16-bit to 4-bit achieves nearly the same average error (less than 3%). The derived analytical model of the proposed in-memory stochastic computing architecture demonstrates that the 4-bit stochastic architecture achieves the highest throughput per sub-array (122 Ops/Cycle), which is better than the 16-bit stochastic precision by 4.36x, while still maintaining a small average error of 2.25%.

Journal article

Jiang X, Sbandati C, Reynolds G, Wang C, Papavassiliou C, Serb A, Prodromakis T, Wang Set al., 2023, A Neural Recording System with 16 Reconfigurable Front-end Channels and Memristive Processing/Memory Unit, 21st IEEE Interregional NEWCAS Conference (NEWCAS), Publisher: IEEE, ISSN: 2472-467X

Conference paper

Wang C, Si Z, Jiang X, Malik A, Pan Y, Stathopoulos S, Serb A, Wang S, Prodromakis T, Papavassiliou Cet al., 2022, Multi-State Memristors and Their Applications: An Overview, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol: 12, Pages: 723-734, ISSN: 2156-3357

Journal article

Mifsud A, Shen J, Feng P, Xie L, Wang C, Pan Y, Maheshwari S, Agwa S, Stathopoulos S, Wang S, Serb A, Papavassiliou C, Prodromakis T, Constandinou TGet al., 2022, A CMOS-based characterisation platform for emerging RRAM technologies, 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Publisher: IEEE, Pages: 75-79

Mass characterisation of emerging memory devices is an essential step in modelling their behaviour for integration within a standard design flow for existing integrated circuit designers. This work develops a novel characterisation platform for emerging resistive devices with a capacity of up to 1 million devices on-chip. Split into four independent sub-arrays, it contains on-chip column-parallel DACs for fast voltage programming of the DUT. On-chip readout circuits with ADCs are also available for fast read operations covering 5-decades of input current (20nA to 2mA). This allows a device’s resistance range to be between 1kΩ and 10MΩ with a minimum voltage range of ±1.5V on the device.

Conference paper

Founta E, Schoetz T, Georgiadou DG, Prodromakis T, Ponce de Leon Cet al., 2022, Nanocellulose-Based Flexible Electrodes for Safe and Sustainable Energy Storage, ECS Meeting Abstracts, Vol: MA2022-02, Pages: 275-275

<jats:p> The intensive use of battery-powered electronic devices, in addition to the challenging recycling requirements, have contributed to the accumulation of e-waste, one of the most alarming environmental issues of the modern world. This urges the importance of developing advanced energy storage systems by using non-toxic and more sustainable materials<jats:sup>1</jats:sup>. Nanocellulose as the most abundant bio-polymer, can tackle current ecological and safety concerns but also keep up with contemporary resilience requisites in powering flexible electronics. Herein, we present the development of organic nanocellulose-based battery electrodes, that can be used in applications with relatively low energy storage demands, such as medical systems, wearables and bendable Internet of Things (IoT) devices. We investigate hybrid electrodes composed of nanocellulose fibres and carbon-based battery active materials, by implementing a safer, aqueous fabrication processing and with a focus on understanding the underlying charge storage mechanisms<jats:sup>2</jats:sup>. The main constituent of the electrodes is a porous nanocellulose network that maintains structural integrity acting as a binder but also transports ions from an organic electrolyte to the active battery material with reduced diffusion limitations. The overall battery structure is flexible and mechanically robust, minimizing any volume changes during charge/discharge, which translates to cycling stability<jats:sup>3</jats:sup>.</jats:p> <jats:p>The nanocellulose-based electrodes were manufactured by using different techniques including vacuum filtration and blade coating, and yielded free-standing and current-collector-integrated electrodes. Structural properties and surface morphology were examined via atomic force microscopy (tapping mode and conductive-AFM), and scanning electron microscopy with energy dispersive X-ray spectroscopy (SEM-

Journal article

Maheshwari S, Serb A, Papavassiliou C, Prodromakis Tet al., 2022, An Adiabatic Capacitive Artificial Neuron With RRAM-Based Threshold Detection for Energy-Efficient Neuromorphic Computing, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, Vol: 69, Pages: 3512-3525, ISSN: 1549-8328

Journal article

Prasad B, Parkin S, Prodromakis T, Eom CB, Sort J, Macmanus-Driscoll JLet al., 2022, Material challenges for nonvolatile memory, APL Materials, Vol: 10

Journal article

Foster P, Huang J, Serb A, Stathopoulos S, Papavassiliou C, Prodromakis Tet al., 2022, An FPGA-based system for generalised electron devices testing, Scientific Reports, Vol: 12, ISSN: 2045-2322

Electronic systems are becoming more and more ubiquitous as our world digitises. Simultaneously, even basic components are experiencing a wave of improvements with new transistors, memristors, voltage/current references, data converters, etc, being designed every year by hundreds of R &D groups world-wide. To date, the workhorse for testing all these designs has been a suite of lab instruments including oscilloscopes and signal generators, to mention the most popular. However, as components become more complex and pin numbers soar, the need for more parallel and versatile testing tools also becomes more pressing. In this work, we describe and benchmark an FPGA system developed that addresses this need. This general purpose testing system features a 64-channel source-meter unit, and [Formula: see text] banks of 32 digital pins for digital I/O. We demonstrate that this bench-top system can obtain [Formula: see text] current noise floor, [Formula: see text] pulse delivery at [Formula: see text] and [Formula: see text] maximum current drive/channel. We then showcase the instrument's use in performing a selection of three characteristic measurement tasks: (a) current-voltage characterisation of a diode and a transistor, (b) fully parallel read-out of a memristor crossbar array and (c) an integral non-linearity test on a DAC. This work introduces a down-scaled electronics laboratory packaged in a single instrument which provides a shift towards more affordable, reliable, compact and multi-functional instrumentation for emerging electronic technologies.

Journal article

Yang F, Serb A, Prodromakis T, 2022, Measured behaviour of a memristor-based tuneable instrumentation amplifier, ELECTRONICS LETTERS, Vol: 58, Pages: 570-572, ISSN: 0013-5194

Journal article

Giotis C, Serb A, Manouras V, Stathopoulos S, Prodromakis Tet al., 2022, Palimpsest memories stored in memristive synapses, SCIENCE ADVANCES, Vol: 8, ISSN: 2375-2548

Journal article

Manouras V, Stathopoulos S, Serb A, Prodromakis Tet al., 2022, Selectively biased tri-terminal vertically-integrated memristor configuration, SCIENTIFIC REPORTS, Vol: 12, ISSN: 2045-2322

Journal article

Panidi J, Georgiadou DG, Schoetz T, Prodromakis Tet al., 2022, Advances in Organic and Perovskite Photovoltaics Enabling a Greener Internet of Things, ADVANCED FUNCTIONAL MATERIALS, Vol: 32, ISSN: 1616-301X

Journal article

Antoniou G, Yuan P, Koutsokeras L, Athanasopoulos S, Fazzi D, Panidi J, Georgiadou DG, Prodromakis T, Keivanidis PEet al., 2022, Low-power supralinear photocurrent generation <i>via</i> excited state fusion in single-component nanostructured organic photodetectors, JOURNAL OF MATERIALS CHEMISTRY C, Vol: 10, Pages: 7575-7585, ISSN: 2050-7526

Journal article

Huang J, Stathopoulos S, Serb A, Prodromakis Tet al., 2022, NeuroPack: An Algorithm-Level Python-Based Simulator for Memristor-Empowered Neuro-Inspired Computing, FRONTIERS IN NANOTECHNOLOGY, Vol: 4

Journal article

Simanjuntak FM, Panidi J, Talbi F, Kerrigan A, Lazarov VK, Prodromakis Tet al., 2022, Formation of a ternary oxide barrier layer and its role in switching characteristic of ZnO-based conductive bridge random access memory devices, APL MATERIALS, Vol: 10, ISSN: 2166-532X

Journal article

Abbey T, Giotis C, Serb A, Stathopoulos S, Prodromakis Tet al., 2022, Thermal Effects on Initial Volatile Response and Relaxation Dynamics of Resistive RAM Devices, IEEE ELECTRON DEVICE LETTERS, Vol: 43, Pages: 386-389, ISSN: 0741-3106

Journal article

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