DrYanLiu

Faculty of Engineering, Department of Electrical and Electronic Engineering

Academic Visitor

Contact

yan.liu06 CV

Location

Electrical EngineeringSouth Kensington Campus

Summary

Overview

Dr Yan Liu currently is an associate professor in Shanghai Jiaotong university (PWP in SJTU), he is also a visiting academic in Centre of Bio-inspired Technology, Department of Electrical and Electronic, Imperial College. He was working within Next Generation Neural Interfaces (NGNI) Lab during his postdoc research in Imperial College, and involved in CANDO , iProbe, NGNI, I2MOVE and Senseback projects.

His research interest includes low power mixed-signal integrated circuits, biomedical circuits and systems, Lab-on-chip.

SHORT BIOGRAPHY

Dr Yan Liu received the B.Eng degree in 2006 from Zhejiang University, China, the M.Sc degree in 2007 and Ph,D in 2012 from Electrical and Electronic Engineering at Imperial College London, UK. From 2012 to 2019 he was a research associate and research fellow with NGNI lab. Since 2020 he is an associate professor in Shanghai Jiaotong university

Publications

Journals

Zhang J, Sin S-W, Liu Y, et al.Zhang J, Sin S-W, Liu Y, Ye F, Wang G, Ortmanns M, Qi L close, 2023, On the Synthesis of Continuous-Time Sturdy MASH Delta-Sigma Modulators, Ieee Transactions on Circuits and Systems Ii-express Briefs, Vol:70, ISSN:1549-7747, Pages:356-360

Li Y, Zhao J, Liu Y, et al.Li Y, Zhao J, Liu Y, Wang G close, 2023, A Comprehensive Study on the Design Methodology of Level Shifter Circuits, Ieee Transactions on Circuits and Systems I-regular Papers, Vol:70, ISSN:1549-8328, Pages:302-314

Liu H, Lin Y, Qi L, et al.Liu H, Lin Y, Qi L, Lou Y, Wang G, Liu Y close, 2022, Analysis and Design of VCO-Based Neural Front-End With Mixed Domain Level-Crossing for Fast Artifact Recovery, Ieee Transactions on Circuits and Systems I-regular Papers, ISSN:1549-8328

Liu H, Qi L, Wang G, et al.Liu H, Qi L, Wang G, Liu Y close, 2022, A VCO-Based CTDSM With Integrated Phase Error Correction for Neural Interface, Ieee Transactions on Circuits and Systems Ii: Express Briefs, Vol:69, ISSN:1549-7747, Pages:4018-4022

Liu H, Guo T, Yan P, et al.Liu H, Guo T, Yan P, Qi L, Chen M, Wang G, Liu Y close, 2022, A Hybrid 1<sup>st</sup>/2<sup>nd</sup>-Order VCO-Based CTDSM With Rail-to-Rail Artifact Tolerance for Bidirectional Neural Interface, Ieee Transactions on Circuits and Systems Ii: Express Briefs, Vol:69, ISSN:1549-7747, Pages:2682-2686

More Publications