Imperial College London
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DrYanLiu

Faculty of Engineering, Department of Electrical and Electronic Engineering

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Location

 

Electrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Maslik:2017:10.1109/ISCAS.2017.8050620,
author = {Maslik, M and Liu, Y and Lande, TS and Constandinou, TG},
doi = {10.1109/ISCAS.2017.8050620},
pages = {1420--1423},
publisher = {IEEE},
title = {A charge-based ultra-low power continuous-time ADC for data driven neural spike processing},
url = {http://dx.doi.org/10.1109/ISCAS.2017.8050620},
year = {2017}
}
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RIS format (EndNote, RefMan)

TY  - CPAPER
AB  - The paper presents a novel topology of a continuous-time analogue-to-digital converter (CT-ADC) featuring ultra-low static power consumption, activity-dependent dynamic consumption, and a compact footprint. This is achieved by utilising a novel charge-packet based threshold generation method, that alleviates the requirement for a conventional feedback DAC. The circuit has a static power consumption of 3.75uW, with dynamic energy of 1.39pJ/conversion level. This type of converter is thus particularly well-suited for biosignals that are generally sparse in nature. The circuit has been optimised for neural spike recording by capturing a 3kHz bandwidth with 8-bit resolution. For a typical extracellular neural recording the average power consumption is in the order of ~4uW. The circuit has been implemented in a commercially available 0.35um CMOS technology with core occupying a  footprint of 0.12 sq.mm
AU  - Maslik,M
AU  - Liu,Y
AU  - Lande,TS
AU  - Constandinou,TG
DO  - 10.1109/ISCAS.2017.8050620
EP  - 1423
PB  - IEEE
PY  - 2017///
SP  - 1420
TI  - A charge-based ultra-low power continuous-time ADC for data driven neural spike processing
UR  - http://dx.doi.org/10.1109/ISCAS.2017.8050620
UR  - http://hdl.handle.net/10044/1/46112
ER  -
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