TY - JOUR AB - A systematic approach to customising Homogeneous Multi-Processor (HoMP) architectures is described. The approach involves a novel design space exploration tool and a parameterisable system model. Post-fabrication customisation options for using reconfigurable logic with a HoMP are classified. The adoption of the approach in exploring pre- and post-fabrication customisation options to optimise an architecture's critical paths is then described. The approach and steps are demonstrated using the architecture of a graphics processor. We also analyse on-chip and off-chip memory access for systems with one or more processing elements (PEs), and study the impact of the number of threads per PE on the amount of off-chip memory access and the number of cycles for each output. It is shown that post-fabrication customisation of a graphics processor can provide up to four times performance improvement for negligible area cost. © 2011 Springer-Verlag Berlin Heidelberg. AU - Cope,B AU - Cheung,PYK AU - Luk,W AU - Howes,L DO - 10.1007/978-3-642-24568-8-4 EP - 83 PY - 2011/// SN - 0302-9743 SP - 63 TI - A systematic design space exploration approach to customising multi-processor architectures: Exemplified using graphics processors T2 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) UR - http://dx.doi.org/10.1007/978-3-642-24568-8-4 VL - 6760 LNCS ER -