Selected Publications per subject

Machine Learning

  1. Alexandros Kouris and Christos-Savvas Bouganis, "Learning to Fly by MySelf: A Self-Supervised CNN-based Approach for Autonomous Navigation",  IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2018 [to appear]
     
  2. Stylianos I. Venieris and Christos-Savvas Bouganis, "fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs"IEEE Transactions on Neural Networks and Learning Systems, 2018 (pdf)

  3. Stylianos I. Venieris and Christos-Savvas Bouganis, "f-CNNx: A Toolflow for Mapping Multiple Convolutional Neural Networks on FPGAs", 28th International Conference on Field Programmable Logic and Applications (FPL), 2018 [to appear] (preprint)

  4. Alexandros Kouris, Stylianos I. Venieris and Christos-Savvas Bouganis, "CascadeCNN: Pushing the Performance Limits of Quantisation in Convolutional Neural Networks"28th International Conference on Field Programmable Logic and Applications (FPL), 2018 (preprint)

  5. Stylianos I. Venieris, Alexandros Kouris and Christos-Savvas Bouganis, "Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions"ACM Computing Surveys, 2018 [to appear] (pdf) 

  6. Alexandros Kouris, Stylianos I. Venieris and Christos-Savvas Bouganis, "CascadeCNN: Pushing the performance limits of quantisation"SysML, 2018 (pdf)

  7. Michalis Rizakis, Stylianos I. Venieris, Alexandros Kouris and Christos-Savvas Bouganis, "Approximate FPGA-based LSTMs under Computation Time Constraints"International Symposium on Applied Reconfigurable Computing (ARC), 2018 [Best Paper Award Nomination] (pdf)

  8. Christos Kyrkou, George Plastiras, Stylianos I. Venieris, Theocharis Theocharides and Christos-Savvas Bouganis, "DroNet: Efficient Convolutional Neural Network Detector for Real-Time UAV Applications"International Conference on Design, Automation and Test in Europe (DATE), 2018 (pdf).

  9. Stylianos I. Venieris and Christos-Savvas Bouganis, "fpgaConvNet: A Toolflow for Mapping Diverse Convolutional Neural Networks on Embedded FPGAs", Workshop on Machine Learning on the Phone and other Consumer Devices (MLPCD), NIPS 2017 (pdf)

  10. Stelios Venieris, Christos Bouganis, “Latency-Driven Design for FPGA-based Convolutional Neural Networks”, FPL 2017 (pdf)

  11. Stelios Venieris, Christos Bouganis, “fpgaConvNet: A Framework for Mapping Convolutional Neural Networks on FPGAs”,Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 40-47, 2016, (pdf) (slides)

  12. C. Kyrkou, and T. Theocharides, C.-S. Bouganis, and M. Polycarpou, “Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machined”, IEEE Transactions on Neural Networks and Learning Systems, Vol: 27, Issue 1, Jan. 2016 (pdf)  

  13. Mudhar Bin Rabieah, Christos Bouganis, “Fast FPGA System for Training Nonlinear Support Vector Machines”, LearningSys 2015:1-4 (pdf)

  14. Mudhar Bin Rabieah, Christos Bouganis, “FPGA based nonlinear Support Vector Machine training using an ensemble learning”, FPL 2015:1-4 (pdf)

  15. Chuan Cheng, Christos Bouganis, “Memory optimisation for hardware induction of axis-parallel decision tree”, ReConFig 2014:1-7 (pdf)

  16. C. Kyrkou, and T. Theocharides, and C.-S. Bouganis "An Embedded Hardware-Efficient Architecture for Real-Time Cascade Support Vector Machine Classification", IC SAMOS 2013, pp.129-136 (pdf)

  17. C. Cheng and C.-S. Bouganis "Accelerating Random Forest training process using FPGA", FPL 2013, pp.1-4 (pdf)

  18. Christos Kyrkou, C.-S. Bouganis, Theocharis Theocharides, "FPGA-based acceleration of cascaded support vector machines for embedded applications", (abstract only), FPGA 2013, pp. 267

  19. Christos Kyrkou, Theocharis Theocharides, C.-S. Bouganis, "A hardware-efficient architecture for embedded real-time cascaded support vector machines classification", ACM Great Lakes Symposium on VLSI 2013, pp. 341-342 (pdf)

  20. M. Papadonikolakis, C. Bouganis , "Novel Cascade FPGA Accelerator for Support Vector Machines Classification", Neural Networks and Learning Systems, IEEE Transactions on, vol.23(7), pp.1040-1052 (pdf)

  21. M. Papadonikolakis and C.-S. Bouganis, “A Novel FPGA-Based Support Vector Machine Classifier”, FPT 2010 (pdf)

  22. M.Papadonikolakis and C.-S. Bouganis, “A Heterogeneous FPGA Architecture for Support Vector Machine Training”, Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 211-214, 2010 (pdf).

  23. M.Papadonikolakis, C.Bouganis and G.A.Constantinides, "Performance Comparison of GPU and FPGA Architectures for the SVM Training Problem", Proc. IEEE International Conference on Field-Programmable Technology, pp. 388-391, 2009 (pdf).

  24. M. Papadonikolakis and C.-S. Bouganis, "A Scalable FPGA Architecture for Non-Linear SVM Training", Proc. IEEE International Conference on Field Programmable Technology, pp.337-340, 2008 (pdf).

  25. M. Papadonikolakis and C.-S. Bouganis, "Efficient FPGA Mapping of Gilbert's Algorithm For SVM Training on Large-Scale Classification Problems", Proc. IEEE International Conference on Field Programmable Logic and Applications, pp.385-390, 2008 (pdf).

Computer Vision

  1. Konstantinos Boikos, C.-S. Bouganis, “A High-Performance System-on-Chip Architecture for Direct Tracking for SLAM”, FPL 2017, (to appear) (pdf)

  2. Konstantinos Boikos, C.-S. Bouganis, “Semi-dense SLAM on an FPGA SoC”, FPL 2016, pp. 1-4 (pdf)

  3. Jianxiong Liu, C.-S. Bouganis, Peter Cheung, “Context-based Image Acquisition From Memory in Digital Systems”, Journal of Real-Time Image Processing, 2016, pp. 1-20 (pdf)

  4. Yonggang Jin, C.-S. Bouganis, “Robust multi-image based blind face hallucination”, CVPR 2015: 5252-5260 (pdf)

  5. M. Angelopoulou, C.-S. Bouganis , "Vision-Based Egomotion Estimation on FPGA for Unmanned Aerial Vehicle Navigation", IEEE Transactions on Circuits and Systems for Video Technology, 24(6), 2014, pp.1070-1083. (pdf)

  6. Jianxiong Liu, Christos Bouganis, Peter Cheung, “Kernel-based Adaptive Image Sampling”, VISAPP (1) 2014:25-32 (pdf)

  7. Jianxiong Liu, Christos Bouganis, Peter Cheung, “Image progressive acquisition for hardware systems”, DATE 2014:1-6 (pdf)

  8. Yonggang Jin, C.-S. Bouganis, "Face hallucination revisited: A joint framework", ICIP 2013, pp.981-985 (pdf)

  9. Jianxiong Liu, Christos Bouganis, and Peter Y.K. Cheung, "Domain-specific Progressive Sampling of Face Images", IEEE Global Conference on Signal and Information Processing (GlobalSIP) 2013, pp.1021-1024 (pdf)

  10. A. Powell, C.-S. Bouganis and Peter Y. K. Cheung "Early performance estimation of image compression methods on soft processors", FPL 2012, pp. 587-590 (pdf)

  11. M.Angelopoulou, C.Bouganis and P.Y.K.Cheung, "Blur Identification with Assumption Validation for Sensor-based Video Reconstruction and its Implementation on FPGA", IET Computers & Digital Techniques, Vol 5, Issue 4, 2011, pp. 271-286. (pdf)

  12. C. Cheng and C.-S. Bouganis "An FPGA-based object detector with dynamic workload balancing", FPT 2011, pp.1-4 (pdf)

  13. M. Angelopoulou and C.-S. Bouganis, “Feature Selection with Geometric Constraints for Vision-Based Unmanned Aerial Vehicle Navigation”, ICIP 2011, pp. 2357-2360, (pdf)

  14. David H. Jones, Adam Powell, C.-S. Bouganis and Peter Y.K. Cheung , “A Salient region detector for GPU using a cellular automata architecture”, ICONIP 2010, pp. 501-508, 2010 (pdf)

  15. C.-S. Bouganis, I. Pournara and Peter Y.K. Cheung, "Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs", IEEE Transactions on Very Large Scale Integration (VLSI) Systems (to appear). (pdf)

  16. Maria E. Angelopoulou, C.-S. Bouganis, Peter Y.K. Cheung and George A. Constantinides, "Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement", ACM Transactions on Reconfigurable Technology and Systems, Vol. 2, No. 4, Article 22, 2009. (pdf)

  17. D. Bailey and C.Bouganis, "Vision sensor with an active digital fovea", Recent Advances in Sensing Technology: LNEE 49, pp.91-111 (2009).

  18. C.-S. Bouganis, S.-B. Park, G.A. Constantinides and P.Y.K. Cheung, "Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs", ACM Transactions on Reconfigurable Technology and Systems, Vol. 1, No. 4, Article 24, 2009. (pdf)

  19. M.Angelopoulou, C.Bouganis and P.Y.K.Cheung, "A sensor-based approach to linear blur identification for real-time video enhancement", IEEE International Conference on Image Processing, pp. 141-144, 2009 (pdf).

  20. D. Bailey and C.Bouganis, "Implementation of a Foveal Vision Mapping", Proc. IEEE International Conference on Field Programmable Technology, pp. 22-29, 2009 (pdf).

  21. D. Bailey and C.-S. Bouganis, "Tracking Performance of a Foveated Vision System", 4th International Conference on Autonomous Robots and Agents, pp.414-419, 2008 (pdf).

  22. D. Bailey and C.-S. Bouganis, "Reconfigurable Foveated Active Vision System", 3rd International Conference on Sensing Technology, pp.162-167, 2008 (pdf).

  23. M. Angelopoulou, C.-S. Bouganis and P.Y.K. Cheung, "Video Enhancement On An Adaptive Image Sensor", in Proc. International Conference on Image Processing, San Diego, California, USA, pp.681-684, 2008 (pdf).

  24. O. Bowen and C.-S. Bouganis, "Real-Time Image Super-Resolution Usign An FPGA", Proc. IEEE International Conference on Field Programmable Logic and Applications, pp.89-94, 2008 (pdf).

  25. M. Angelopoulou, C.-S. Bouganis, P.Y.K. Cheung and G.A. Constantinides, "FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor", Proc. Applied Reconfigurable Computing, pp.125-136, 2008 (pdf).

  26. C.-S. Bouganis, I. Pournara and P.Y.K. Cheung, "Efficient Mapping of Dimensionality Reduction Designs onto Heterogeneous FPGAs", Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, pp.141-150 (2007) (pdf).

  27. S.A. Fahmy, C.-S. Bouganis, P.Y.K. Cheung and W. Luk, "Real-time hardware acceleration of the trace transform", Journal of Real-Time Image Processing 2 (4), pp.235-248, 2007. (pdf)

  28. Christos Bouganis and Mike Brookes, "Statistical Multiple Light Source Detection", IET Computer Vision 1 (2), pp.79-91, 2007. (pdf)

  29. C.-S. Bouganis, I. Pournara and P.Y.K. Cheung, "A Statistical Framework for Dimensionality Reduction Implementation in FPGAs", IEEE International Conference on Field Programmable Technology, 2006 (pdf).

  30. C.-S. Bouganis, P.Y.K. Cheung and L. Zhaoping, "FPGA-Accelerated Pre-attentive Segmentation in Primary Visual Cortex", in Proc. IEEE International Conference on Field Programmable Logic and Applications, Madrid, August 2006 (pdf).

  31. S. Fahmy, C.-S. Bouganis, P.Y.K. Cheung and W. Luk, "Efficient Real-time FPGA Implementation of the Trace Transform", in Proc. IEEE International Conference on Field Programmable Logic and Applications, Madrid, August, 2006 (pdf).

  32. Y. Liu, C-S. Bouganis, P.Y.K. Cheung, "Spatiotemporal Saliency Framework", in Proc. International Conference on Image Processing, Atlanta, GA, 2006 (pdf).

  33. C.-S. Bouganis, G.A. Constantinides and P.Y.K. Cheung, "A Novel 2D Filter Design Methodology For Heterogeneous Devices", in Proc. IEEE Symposium on Field-Programmable Custom Computing Machines, Napa, CA, pp. 13-22, 2005 (pdf).

  34. C.-S. Bouganis, P.Y.K. Cheung and G.A. Constantinides, "Heterogeneity Exploration for Multiple 2D Filter Designs", in Proc. IEEE International Conference on Field Programmable Logic and Applications, Tampere, Finland, pp. 263-268, 2005 (pdf).

  35. C.-S. Bouganis, G.A. Constantinides and P.Y.K. Cheung, "A Novel 2D Filter Design Methodology", in Proc. IEEE International Symposium on Circuits and Systems, Vol. 1, pp. 532-535, Kobe, Japan, 2005 (pdf).

  36. C.-S. Bouganis, P.Y.K. Cheung, J. Ng and A. Bharath, "A Steerable Complex Wavelet Construction and its implementation on FPGA", in Proc. International Conference on Field Programmable Logic and Applications, pp. 394-403, Antwerp, Belgium, 2004 (pdf).

  37. C.-S. Bouganis and M. Brookes, "Class-based Multiple Light Detection: An Application to Faces", in Proc. British Machine Vision Conference, Vol. 1, pp. 113-122, Norwich, U.K. 2003 (pdf).

  38. C.-S. Bouganis and M. Brookes, "Multiple Light Source Detection", IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 26 (4), pp. 509-514, 2004. (pdf)

Statistical Inference

  1. Grigorios Mingas, Leonardo Bottolo, C.-S. Bouganis, “Particle MCMC algorithms and architectures for accelerating inference in state-space models”. Int. J. Approx. Reasoning 83: 413-433 (2017) (pdf)

  2. Shuanglong Liu, C.-S. BouganisCommunication-Aware MCMC Method for Big Data Applications on FPGAs”, FCCM 2017:9-16 (pdf)

  3. Grigorios Mingas and C.-S. Bouganis "Population-based MCMC on multi-core CPUs, GPUs and FPGAs", IEEE Transactions on Computers, 2015, Vol: 65, Issue: 4 (pdf)

  4. Shuanglong Liu, Grigorios Mingas, Christos Bouganis, “An Exact MCMC Accelerator Under Custom Precision Regimes”, FPT 2015, pp. 120-127 (pdf)

  5. Shuanglong Liu, Grigorios Mingas, Christos Bouganis, “Parallel resampling for particle filters on FPGAs”, FPT 2014:191-198 (pdf)

  6. Grigorios Mingas, Farhan Rahman, C.-S. Bouganis, "On Optimizing the Arithmetic Precision of MCMC Algorithms", FCCM 2013, pp. 181-188 (pdf)

  7. G. Mingas and C.-S. Bouganis "A Custom Precision Based Architecture for Accelerating Parallel Tempering MCMC on FPGAs Without Introducing Sampling Error", FCCM 2012, pp. 153-156 (pdf)

  8. G. Mingas and C.-S. Bouganis "Parallel Tempering MCMC Acceleration Using Reconfigurable Hardware", ARC 2012, pp. 227-238 (pdf)

  9. X. Tian and C.-S. Bouganis, “A Run-Time Adaptive FPGA Architecture for Monte Carlo Simulations”, FPL 2011, pp. 116-122, 2011 (pdf)

  10. C. Saiprasert, C.-S. Bouganis and G.A. Constantinides, “Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA”, FPL, pp. 89-94, 2010 (pdf)

  11. C. Saiprasert, C.-S. Bouganis and G.A. Constantinides, “Design of a Financial Application Driven Multivariate Gaussian Random Number Generator for an FPGA”, ARC, pp. 182-193, 2010 (pdf)

  12. C. Saiprasert, C.Bouganis and G.A.Constantinides, "An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator", ACM Transactions on Reconfigurable Technology and Systems, Volume 4 Issue 1, December 2010, Article No. 2. (pdf)

  13. C. Saiprasert, C.-S. Bouganis and G.A. Constantinides, "Word-length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator", Proc. Applied Reconfigurable Computing, pp. 231-242, 2009 (pdf).

  14. C. Saiprasert, C.-S. Bouganis and G.A. Constantinides, "Reconfigurable Multivariate Gaussian Random Number Generator with Controllable Resources", Proc Applied Reconfigurable Computing, pp.233-244, 2008 (pdf).

Computing with Unreliable HW

  1. Rui Policarpo Duarte, C.-S. Bouganis, “ARC 2014: Over-Clocking KLT Designs on FPGAs under Process, Voltage, and Temperature Variation”, TRETS 9(1):7 (2015) (pdf)

  2. Rui Policarpo Duarte, C.-S. Bouganis, "Zero-latency datapath error correction framework for over-clocking DSP applications on FPGAs”, ReConFig 2014:1-7 (pdf)

  3. Rui Policarpo Duarte, C.-S. Bouganis, "A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT Variation”, ARC 2014:49-60 (pdf)

  4. Rui Policarpo Duarte, C.-S. Bouganis, "Over-clocking of Linear Projections Designs through Device Specific Optimisations”, IPDPS Workshops 2014: 189-198 (pdf)

  5. Rui Policarpo Duarte, C.-S. Bouganis, "Pushing the performance boundary of linear projection designs through device specific optimisations”, (abstract),  FPGA 2014:245

  6. Ioannis SourdisChristos StrydisA. ArmatoChristos-Savvas BouganisBabak FalsafiGeorgi Nedeltchev GaydadjievSebastian IsazaAlirad MalekR. MarianiSamuel N. PagliariniDionisios N. PnevmatikatosDhiraj K. PradhanGerard K. RauwerdaRobert M. SeepersRishad Ahmed ShafikGeorgios SmaragdosDimitris TheodoropoulosStavros TzilisMichalis Vavouras:”DeSyRe: On-Demand Adaptive and Reconfigurable Fault-Tolerant SoCs”, ARC 2014: 312-317

  7. Rui Policarpo Duarte, C.-S. Bouganis, "High-level linear projection circuit design optimization framework for FPGAs under over-clocking", FPL 2012, pp. 723-726 (pdf)

  8. Ioannis Sourdis, Christos Strydis, C.-S. Bouganis, Babak Falsafi, Georgi Nedeltchev Gaydadjiev, Alirad Malek, R. Mariani, Dionisios N. Pnevmatikatos, D. K. Pradhan, Gerard K. Rauwerda, Kim Sunesen, Stavros Tzilis, "The DeSyRe Project: On-Demand System Reliability", DSD 2012, pp. 335-342 (pdf)

Misc

  1. Neil Scicluna, C. Bouganis, “ARC 2014: A Multidimensional FPGA-Based Parallel DBSCAN Architecture”, TRETS 9(1):2, 2015 (pdf)

  2. Stylianos I. Venieris, Grigorios Mingas, Christos Bouganis, “Towards heterogeneous solvers for large-scale linear systems”, FPL 2015:1-8 (pdf)

  3. Powell, C. Bouganis , P. Cheung, "High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration", Journal of Systems Architecture - Embedded Systems Design, Vol. 59, pp. 1144-1156 (pdf)

  4. Neil Scicluna, C. Bouganis, “FPGA-Based Parallel DBSCAN Architecture”, ARC 2014:1-12 (pdf)

  5. Y. Liu, C.-S. Bouganis and Peter Y.K. Cheung, "Hardware architectures for eigenvalue computation of real symmetric matrices", IET Computers & Digital Techniques, Vol. 3, Issue 1, pp. 72-84, 2009. (pdf)

  6. David H. Jones, Adam Powell, C.-S. Bouganis and Peter Y.K. Cheung, “GPU versus FPGA for High Productivity Computing”, FPL, pp. 119-124, 2010 (pdf).

  7. Y. Liu, C.-S. Bouganis and P.Y.K. Cheung, "Efficient Mapping of a Kalman Filter into FPGA Using Tayor Expansion", Proc. IEEE International Conference on Field Programmable Logic and Applications, (2007) (pdf).

  8. S. Bayliss, C.-S. Bouganis, and G.A. Constantinides, "An FPGA Implementation of the Simplex Algorithm", IEEE International Conference on Field Programmable Technology, 2006 (pdf).

  9. Y. Liu, C.-S. Bouganis, P.Y.K. Cheung, P.H.W. Leong and S.J. Motley, "Hardware Efficient Architectures for Eigenvalue Computation", in Proc. Design, automation and test in Europe, Munich, Germany, pp. 953-958, 2006 (pdf).

  10. I. Pournara, C.-S. Bouganis and G.A. Constantinides, "FPGA-Accelerated Reconstruction of Gene Regulatory Networks", in Proc. IEEE International Conference on Field Programmable Logic and Applications, Tampere, Finland, pp. 323-328, 2005 (pdf).

  11. C.-S. Bouganis, D. Koukopoulos and D. Kalles, "A real-time auction system over the WWW'', in Proc. Conference on Communication Networks and Distributed Systems Modelling and Simulation, San Francisco, CA, 1999 (pdf).