Imperial College London

DrChristoforosPanteli

Faculty of EngineeringDepartment of Electrical and Electronic Engineering

Visiting Researcher
 
 
 
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Contact

 

christoforos.panteli11 CV

 
 
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Location

 

Electrical EngineeringSouth Kensington Campus

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Summary

 

Publications

Citation

BibTex format

@inproceedings{Goel:2022:10.1109/BioCAS54905.2022.9948590,
author = {Goel, K and Panteli, C and Moser, N and Georgiou, P},
doi = {10.1109/BioCAS54905.2022.9948590},
pages = {139--143},
title = {Reducing Drift in CMOS ISFET Arrays with Monolayer Graphene Sheets},
url = {http://dx.doi.org/10.1109/BioCAS54905.2022.9948590},
year = {2022}
}

RIS format (EndNote, RefMan)

TY  - CPAPER
AB - In this paper, we present the scaling of a post-processing method to reduce drift in CMOS Ion-Sensitive Field-Effect Transistor (ISFET) arrays using monolayer graphene sheets. Graphene sheets were transferred using a Polymer Assisted Graphene Transfer (PAGT) process on a 4mm x 4mm chip with a 78x56 dimensional ISFET sensor array. The resulting performance parameters: drift, capacitive attenuation, pH sensitivity, and trapped charge were found, and averaged across all active pixels in the array for 5 dies. The results show, on average, a 55% reduction in drift and an 8% reduction in pH sensitivity for monolayer graphene ISFET arrays compared to plain ISFET arrays, with no effect on trapped charge and capacitive attenuation. Graphene's impermeability limits the modification of the sensing layers while providing physisorption sites to maintain pH sensitivity for the ISFETs. Furthermore, there is no effect on the spatial distribution of performance parameters across the ISFET array associated with transferring monolayer graphene.
AU - Goel,K
AU - Panteli,C
AU - Moser,N
AU - Georgiou,P
DO - 10.1109/BioCAS54905.2022.9948590
EP - 143
PY - 2022///
SP - 139
TI - Reducing Drift in CMOS ISFET Arrays with Monolayer Graphene Sheets
UR - http://dx.doi.org/10.1109/BioCAS54905.2022.9948590
ER -