Imperial College London

Professor Peter Y. K. Cheung

Faculty of EngineeringDyson School of Design Engineering

Head of the Dyson School of Design Engineering



+44 (0)20 7594 6200p.cheung Website




Mrs Wiesia Hsissen +44 (0)20 7594 6261




910BElectrical EngineeringSouth Kensington Campus






BibTex format

author = {Chau, TCP and Niu, X and Eele, A and Maciejowski, J and Cheung, PYK and Luk, W},
doi = {10.1145/2629469},
journal = {ACM Transactions on Reconfigurable Technology and Systems},
title = {Mapping Adaptive Particle Filters to Heterogeneous Reconfigurable Systems},
url = {},
volume = {7},
year = {2014}

RIS format (EndNote, RefMan)

AB - This article presents an approach for mapping real-time applications based on particle filters (PFs) toheterogeneous reconfigurable systems, which typically consist of multiple FPGAs and CPUs. A method isproposed to adapt the number of particles dynamically and to utilise runtime reconfigurability of FPGAs forreduced power and energy consumption. A data compression scheme is employed to reduce communicationoverhead between FPGAs and CPUs. A mobile robot localisation and tracking application is developed toillustrate our approach. Experimental results show that the proposed adaptive PF can reduce up to 99% ofcomputation time. Using runtime reconfiguration, we achieve a 25% to 34% reduction in idle power. A 1Usystem with four FPGAs is up to 169 times faster than a single-core CPU and 41 times faster than a 1UCPU server with 12 cores. It is also estimated to be 3 times faster than a system with four GPUs.
AU - Chau,TCP
AU - Niu,X
AU - Eele,A
AU - Maciejowski,J
AU - Cheung,PYK
AU - Luk,W
DO - 10.1145/2629469
PY - 2014///
SN - 1936-7414
TI - Mapping Adaptive Particle Filters to Heterogeneous Reconfigurable Systems
T2 - ACM Transactions on Reconfigurable Technology and Systems
UR -
UR -
VL - 7
ER -