Imperial College London

ProfessorWayneLuk

Faculty of EngineeringDepartment of Computing

Professor of Computer Engineering
 
 
 
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Contact

 

+44 (0)20 7594 8313w.luk Website

 
 
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Location

 

434Huxley BuildingSouth Kensington Campus

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Summary

 

Publications

Publication Type
Year
to

611 results found

Brown G, Luk W, O'Leary J, 1994, Retargeting a hardware compiler proof using protocol converters., Publisher: IEEE, Pages: 54-63

CONFERENCE PAPER

LUK W, 1993, PIPELINING AND TRANSPOSING HETEROGENEOUS ARRAY DESIGNS, JOURNAL OF VLSI SIGNAL PROCESSING, Vol: 5, Pages: 7-20, ISSN: 0922-5773

JOURNAL ARTICLE

Luk WWC, 1993, Systematic serialisation of array-based architectures, Integration, the VLSI Journal, Vol: 14, Pages: 333-360, ISSN: 0167-9260

This paper describes the use of Ruby, a language of functions and relations, to develop serialised implementations of array-based architectures. Our Ruby expressions contain parameters which can be varied to produce a wide range of designs with different space-time trade-offs. Such expressions can be obtained by applying correctness-preserving transformations to an initial simple description. This approach provides a unified treatment of serialisation schemes similar to LPGS (Locally Parallel Globally Sequential) and LSGP (Locally Sequential Globally Parallel) partitioning methods, and will be illustrated by the development of a variety of circuits for convolution. © 1993.

JOURNAL ARTICLE

Luk WWC, 1992, Transformation techniques for serial array design, Proceedings of the International Conference on Application, Pages: 574-588

This paper describes a design framework for developing application-specific serial array circuits. Starting from a description of the state-transition logic or a fully-parallel architecture, correctness-preserving transformations are employed to derive a wide range of implementations with different space-time trade-offs. The approach has been used in synthesizing designs based on Field-Programmable Gate Arrays, and will be illustrated by the development of a number of circuits including sorters and convolvers.

JOURNAL ARTICLE

LUK W, BROWN G, 1990, A SYSTOLIC LRU PROCESSOR AND ITS TOP-DOWN DEVELOPMENT, SCIENCE OF COMPUTER PROGRAMMING, Vol: 15, Pages: 217-233, ISSN: 0167-6423

JOURNAL ARTICLE

LUK W, 1990, SYSTOLIC BAND-MATRIX MULTIPLIERS, ELECTRONICS LETTERS, Vol: 26, Pages: 403-405, ISSN: 0013-5194

JOURNAL ARTICLE

LUK W, 1990, ANALYZING PARAMETRISED DESIGNS BY NONSTANDARD INTERPRETATION, INTERNATIONAL CONF ON APPLICATION SPECIFIC ARRAY PROCESSORS ( ASAP-90 ), Publisher: I E E E, COMPUTER SOC PRESS, Pages: 133-144

CONFERENCE PAPER

LUK W, 1989, REGULAR PIPELINED MULTIPLIERS, ELECTRONICS LETTERS, Vol: 25, Pages: 1405-1407, ISSN: 0013-5194

JOURNAL ARTICLE

LUK W, JONES G, SHEERAN M, 1989, COMPUTER-BASED TOOLS FOR REGULAR ARRAY DESIGN, 3RD INTERNATIONAL CONF ON SYSTOLIC ARRAYS : SYSTOLIC ARRAY PROCESSORS, Publisher: PRENTICE HALL, Pages: 589-598

CONFERENCE PAPER

LUK W, JONES G, 1988, SYSTOLIC RECURSIVE FILTERS, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, Vol: 35, Pages: 1067-1068, ISSN: 0098-4094

JOURNAL ARTICLE

LUK W, JONES G, 1987, SYSTOLIC ARRAYS FOR RECURSIVE DIGITAL FILTERING, ELECTRONICS LETTERS, Vol: 23, Pages: 1174-1175, ISSN: 0013-5194

JOURNAL ARTICLE

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