Low Power Integrated Circuit Design
A crucial bottleneck in all wearable technologies is power consumption. Power affects the size of the systems, since the power source is generally the most voluminous and heavy component of it. In order to reduce the size- fundamental in the definition of “wearable”- system designers trade off performance with battery lifetime and size. A typical example of this: designers reduce the usable resolution of the signal, as well as the bandwidth. But when doing this, any further signal processing that will need to be carried out at the system level to obtain useful information from what the sensors are detecting will also be compromised, to the point that in the vast majority of cases, important information is lost in the process.
At the Wearable Technologies Lab we specialize on reducing power consumption. We do this in a number of ways, since we believe that the solution to the power problem does not come by targeting it from just one single angle. For an ideal technology, the optimum set of trade offs has to be found, which has to consider all the components of the system simultaneously: the real world application, the system design, the sensors, the hardware and the signal processing/software.
In terms of hardware, we go beyond optimizing the system architecture and relying on existing circuit components which, normally, are general purpose and hence not power optimized for the specific application. Instead we carry out state-of-the-art integrated circuit design research, to create extremely low power integrated circuits and systems. Our integrated circuits power consumption go from as low as a few picoamps to not higher than microamps. Although in order to do this we use all kind of circuit design techniques, both analogue and digital, we are specialists on designing with subthreshold and FGMOS transistors.